[U-Boot] [PATCH 39/39] x86: ivybridge: Implement SDRAM init

[Bin Meng]

Hi Simon,

On Tue, Nov 11, 2014 at 8:29 AM, Simon Glass <sjg at chromium.org> wrote:
> Hi Bin,
>
> On 9 November 2014 23:49, Bin Meng <bmeng.cn at gmail.com> wrote:
>> Hi Simon,
>>
>> On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass <sjg at chromium.org> wrote:
>>> Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in
>>> the board directory and the SDRAM SPD information in the device tree. This
>>> also needs the Intel Management Engine (me.bin) to work. Binary blobs
>>> everywhere: so far we have MRC, ME and microcode.
>>>
>>
>> [snip]
>>
>>> diff --git a/Makefile b/Makefile
>>> index 86d0510..4f0260f 100644
>>> --- a/Makefile
>>> +++ b/Makefile
>>> @@ -956,9 +956,14 @@ u-boot.rom: u-boot-x86-16bit.bin u-boot-dtb.bin \
>>>                 $(srctree)/board/$(BOARDDIR)/descriptor.bin
>>>         $(objtree)/tools/ifdtool -c -r $(CONFIG_ROM_SIZE) \
>>>                 -D $(srctree)/board/$(BOARDDIR)/descriptor.bin u-boot.tmp
>>> +       $(objtree)/tools/ifdtool \
>>> +               -i ME:$(srctree)/board/$(BOARDDIR)/me.bin u-boot.tmp
>>
>> Can we make the ME injection depend on something like CONFIG_X86_HAVE_ME?
>
> Sure - do you have a case that doesn't use ME?

The platform (Atom E6xx and EG20T) I am working on does not have the
ME. Note it also does not have the descriptor.bin.

Regards,
Bin