[U-Boot] [PATCH v3 4/7] DMC: Exynos5: Enable update mode for DREX controller

Simon Glass sjg at chromium.org
Thu Nov 13 03:20:45 CET 2014


On 31 October 2014 02:55, Akshay Saraswat <akshay.s at samsung.com> wrote:
> From: Alim Akhtar <alim.akhtar at samsung.com>
>
> As per Exynos5800 UM ver 0.00 section 17.13.2.1
> CONCONTROL register bit 3 [update_mode], Exynos5800 does not
> support the PHY initiated update. And it is recommanded to
> set this field to 1'b1 during initialization. This patch sets this bit.
> Applying MC-initiated mode makes DDL tracking ON, that helps in
> compensate MIF voltage variation.
>
> Signed-off-by: Alim Akhtar <alim.akhtar at samsung.com>
> Signed-off-by: Doug Anderson <dianders at chromium.org>
> Signed-off-by: Akshay Saraswat <akshay.s at samsung.com>
> ---
> Changes since v2:
>         - Rebased this patch
>
> Changes since v1:
>         - Rebased this patch
>
>  arch/arm/cpu/armv7/exynos/dmc_init_ddr3.c | 19 +++++++++++++++++++
>  arch/arm/include/asm/arch-exynos/dmc.h    |  1 +
>  2 files changed, 20 insertions(+)
>

Acked-by: Simon Glass <sjg at chromium.org>

Tested on Pi:
Tested-by: Simon Glass <sjg at chromium.org>


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