[U-Boot] [PATCH v2] arm: socfpga: set skew settings for ethernet phy
Pavel Machek
pavel at denx.de
Fri Nov 14 11:23:27 CET 2014
On Thu 2014-11-13 11:23:41, dinguyen at opensource.altera.com wrote:
> From: Dinh Nguyen <dinguyen at opensource.altera.com>
>
> Set the PHY skew settings for the ethernet phy on the SOCFPGA Cyclone5
> hardware.
Is it to need similar settings for all ksz9021 phys? Should this go to
drivers/ as I suggested with a patch?
Thanks,
Pavel
> Signed-off-by: Dinh Nguyen <dinguyen at opensource.altera.com>
> Cc: Vince Bridgers <vbridger at opensource.altera.com>
> Cc: Pavel Machek <pavel at denx.de>
> Cc: Marek Vasut <marex at denx.de>
> Cc: Tom Rini <trini at ti.com>
> Cc: Albert Aribaud <albert.u.boot at aribaud.net>
> Cc: Wolfgang Denk <wd at denx.de>
> ---
> v2: Added comments on why it is necessary for setting the skew values.
> ---
> board/altera/socfpga/socfpga_cyclone5.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/board/altera/socfpga/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c
> index 0f81d89..543a143 100644
> --- a/board/altera/socfpga/socfpga_cyclone5.c
> +++ b/board/altera/socfpga/socfpga_cyclone5.c
> @@ -8,7 +8,9 @@
> #include <asm/arch/reset_manager.h>
> #include <asm/io.h>
>
> +#include <micrel.h>
> #include <netdev.h>
> +#include <phy.h>
>
> DECLARE_GLOBAL_DATA_PTR;
>
> @@ -39,3 +41,17 @@ int board_init(void)
>
> return 0;
> }
> +
> +int board_phy_config(struct phy_device *phydev)
> +{
> + /*
> + * These skew settings for the KSZ9021 ethernet phy is required for ethernet
> + * to work reliably on most flavors of cyclone5 boards.
> + */
> + ksz9021_phy_extended_write(phydev, MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
> + 0x0);
> + ksz9021_phy_extended_write(phydev, MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
> + 0x0);
> + ksz9021_phy_extended_write(phydev, MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
> + 0xf0f0);
> +}
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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