[U-Boot] [PATCH v2 08/30] rtc: mc146818: Set up RTC at start of day

Simon Glass sjg at chromium.org
Sat Nov 15 02:18:26 CET 2014


Provide a function to set up the RTC ready for use.

Signed-off-by: Simon Glass <sjg at chromium.org>

---

Changes in v2:
- Drop the part of the commit message that talks about using build date
- Move CLEAR_CMOS up to the top, indicated to be manually changed
- Remove the parameter from rtc_init() and simplify the code

 drivers/rtc/mc146818.c | 43 +++++++++++++++++++++++++++++++++++++++----
 include/rtc.h          |  5 +++++
 2 files changed, 44 insertions(+), 4 deletions(-)

diff --git a/drivers/rtc/mc146818.c b/drivers/rtc/mc146818.c
index f7cf106..39e6041 100644
--- a/drivers/rtc/mc146818.c
+++ b/drivers/rtc/mc146818.c
@@ -14,6 +14,7 @@
 #include <common.h>
 #include <command.h>
 #include <rtc.h>
+#include <version.h>
 
 #if defined(__I386__) || defined(CONFIG_MALTA)
 #include <asm/io.h>
@@ -23,6 +24,9 @@
 
 #if defined(CONFIG_CMD_DATE)
 
+/* Set this to 1 to clear the CMOS RAM */
+#define CLEAR_CMOS 0
+
 static uchar rtc_read  (uchar reg);
 static void  rtc_write (uchar reg, uchar val);
 
@@ -41,7 +45,14 @@ static void  rtc_write (uchar reg, uchar val);
 #define RTC_CONFIG_B		0x0B
 #define RTC_CONFIG_C		0x0C
 #define RTC_CONFIG_D		0x0D
+#define RTC_REG_SIZE		0x80
+
+#define RTC_CONFIG_A_REF_CLCK_32KHZ	(1 << 5)
+#define RTC_CONFIG_A_RATE_1024HZ	6
 
+#define RTC_CONFIG_B_24H		(1 << 1)
+
+#define RTC_CONFIG_D_VALID_RAM_AND_TIME	0x80
 
 /* ------------------------------------------------------------------------- */
 
@@ -128,25 +139,49 @@ void rtc_reset (void)
  */
 static uchar rtc_read (uchar reg)
 {
-	return(in8(CONFIG_SYS_RTC_REG_BASE_ADDR+reg));
+	return in8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg);
 }
 
 static void rtc_write (uchar reg, uchar val)
 {
-	out8(CONFIG_SYS_RTC_REG_BASE_ADDR+reg, val);
+	out8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg, val);
 }
 #else
 static uchar rtc_read (uchar reg)
 {
 	out8(RTC_PORT_MC146818,reg);
-	return(in8(RTC_PORT_MC146818+1));
+	return in8(RTC_PORT_MC146818 + 1);
 }
 
 static void rtc_write (uchar reg, uchar val)
 {
 	out8(RTC_PORT_MC146818,reg);
-	out8(RTC_PORT_MC146818+1,val);
+	out8(RTC_PORT_MC146818+1, val);
 }
 #endif
 
+void rtc_init(void)
+{
+#if CLEAR_CMOS
+	int i;
+
+	rtc_write(RTC_SECONDS_ALARM, 0);
+	rtc_write(RTC_MINUTES_ALARM, 0);
+	rtc_write(RTC_HOURS_ALARM, 0);
+	for (i = RTC_CONFIG_A; i < RTC_REG_SIZE; i++)
+		rtc_write(i, 0);
+	printf("RTC: zeroing CMOS RAM\n");
+#endif
+
+	/* Setup the real time clock */
+	rtc_write(RTC_CONFIG_B, RTC_CONFIG_B_24H);
+	/* Setup the frequency it operates at */
+	rtc_write(RTC_CONFIG_A, RTC_CONFIG_A_REF_CLCK_32KHZ |
+		  RTC_CONFIG_A_RATE_1024HZ);
+	/* Ensure all reserved bits are 0 in register D */
+	rtc_write(RTC_CONFIG_D, RTC_CONFIG_D_VALID_RAM_AND_TIME);
+
+	/* Clear any pending interrupts */
+	rtc_read(RTC_CONFIG_C);
+}
 #endif
diff --git a/include/rtc.h b/include/rtc.h
index c034966..d11aa8b 100644
--- a/include/rtc.h
+++ b/include/rtc.h
@@ -50,4 +50,9 @@ void to_tm (int, struct rtc_time *);
 unsigned long mktime (unsigned int, unsigned int, unsigned int,
 		      unsigned int, unsigned int, unsigned int);
 
+/**
+ * rtc_init() - Set up the real time clock ready for use
+ */
+void rtc_init(void);
+
 #endif	/* _RTC_H_ */
-- 
2.1.0.rc2.206.gedb03e5



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