[U-Boot] [PATCH v2 12/30] pci: Add functions to read and write a BAR address

[Bin Meng]

On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass <sjg at chromium.org> wrote:
> Some PCI functions cannot be auto-configured. Add a function to set up a
> fixed BAR which can be used in these situations. Also add a function to read
> the current address of a BAR.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> Changes in v2:
> - Rename functions to pci_read_bar32() and pci_write_bar32()
>
>  drivers/pci/pci.c | 24 +++++++++++++++++++++---
>  include/pci.h     | 23 +++++++++++++++++++++++
>  2 files changed, 44 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 60c333e..332df61 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -363,9 +363,27 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
>         return phys_addr;
>  }
>
> -/*
> - *
> - */
> +void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,
> +                    u32 addr_and_ctrl)
> +{
> +       int bar;
> +
> +       bar = PCI_BASE_ADDRESS_0 + barnum * 4;
> +       pci_hose_write_config_dword(hose, dev, bar, addr_and_ctrl);
> +}
> +
> +u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum)
> +{
> +       u32 addr;
> +       int bar;
> +
> +       bar = PCI_BASE_ADDRESS_0 + barnum * 4;
> +       pci_hose_read_config_dword(hose, dev, bar, &addr);
> +       if (addr & PCI_BASE_ADDRESS_SPACE_IO)
> +               return addr & PCI_BASE_ADDRESS_IO_MASK;
> +       else
> +               return addr & PCI_BASE_ADDRESS_MEM_MASK;
> +}
>
>  int pci_hose_config_device(struct pci_controller *hose,
>                            pci_dev_t dev,
> diff --git a/include/pci.h b/include/pci.h
> index 2ff7365..ccda2c5 100644
> --- a/include/pci.h
> +++ b/include/pci.h
> @@ -677,5 +677,28 @@ extern void pci_mpc824x_init (struct pci_controller *hose);
>  extern void pci_mpc85xx_init (struct pci_controller *hose);
>  #endif
>
> +/**
> + * pci_write_bar32() - Write the address of a BAR including control bits
> + *
> + * This writes a raw address (with control bits) to a bar
> + *
> + * @hose:      PCI hose to use
> + * @dev:       PCI device to update
> + * @barnum:    BAR number (0-5)
> + * @addr:      BAR address with control bits
> + */
> +void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,
> +                    u32 addr_and_ctrl);
> +
> +/**
> + * pci_read_bar32() - read the address of a bar
> + *
> + * @hose:      PCI hose to use
> + * @dev:       PCI device to inspect
> + * @barnum:    BAR number (0-5)
> + * @return address of the bar, masking out any control bits
> + * */
> +u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum);
> +
>  #endif /* __ASSEMBLY__ */
>  #endif /* _PCI_H */
> --

Reviewed-by: Bin Meng <bmeng.cn at gmail.com>