[U-Boot] [PATCH 2/5] serial: pl01x: fix pl011 baud rate configuration
Vikas Manocha
vikas.manocha at st.com
Tue Nov 18 01:17:50 CET 2014
UART_IBRD, UART_FBRD, and UART_LCR_H form a single 30-bit wide register which
is updated on a single write strobe generated by a UART_LCR_H write. So, to
internally update the content of UART_IBRD or UART_FBRD, a write to UART_LCR_H
must always be performed at the end.
Signed-off-by: Vikas Manocha <vikas.manocha at st.com>
---
drivers/serial/serial_pl01x.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 1860289..c0531ca 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -122,6 +122,7 @@ static int pl01x_generic_serial_init(struct pl01x_regs *regs,
static int pl01x_generic_setbrg(struct pl01x_regs *regs, enum pl01x_type type,
int clock, int baudrate)
{
+ unsigned int lcr;
switch (type) {
case TYPE_PL010: {
unsigned int divisor;
@@ -175,6 +176,11 @@ static int pl01x_generic_setbrg(struct pl01x_regs *regs, enum pl01x_type type,
writel(divider, ®s->pl011_ibrd);
writel(fraction, ®s->pl011_fbrd);
+ /* Internal update of baud rate register require line
+ * control register write */
+ lcr = UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN;
+ writel(lcr, ®s->pl011_lcrh);
+
/* Finally, enable the UART */
writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
UART_PL011_CR_RXE | UART_PL011_CR_RTS, ®s->pl011_cr);
--
1.7.9.5
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