[U-Boot] [PATCH v3 12/26] x86: ivybridge: Add early LPC init so that serial works

[Simon Glass]

On 13 November 2014 06:42, Simon Glass <sjg at chromium.org> wrote:
> The PCH (Platform Controller Hub) includes an LPC (Low Pin Count) device
> which provides a serial port. This is accessible on Chromebooks, so enable
> it early in the boot process.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> Changes in v3: None
> Changes in v2:
> - Fix mangled cros_ec reg property
>
>  arch/x86/cpu/ivybridge/Makefile             |  1 +
>  arch/x86/cpu/ivybridge/cpu.c                | 12 ++++++++
>  arch/x86/cpu/ivybridge/lpc.c                | 48 +++++++++++++++++++++++++++++
>  arch/x86/dts/link.dts                       |  1 +
>  arch/x86/include/asm/arch-ivybridge/pch.h   | 48 +++++++++++++++++++++++++++++
>  doc/device-tree-bindings/misc/intel-lpc.txt | 23 ++++++++++++++
>  6 files changed, 133 insertions(+)
>  create mode 100644 arch/x86/cpu/ivybridge/lpc.c
>  create mode 100644 arch/x86/include/asm/arch-ivybridge/pch.h
>  create mode 100644 doc/device-tree-bindings/misc/intel-lpc.txt

Applied to u-boot-x86.