[U-Boot] [PATCH v3 0/8] x86: Add additional system setup for ivybridge
Simon Glass
sjg at chromium.org
Tue Nov 25 05:18:13 CET 2014
This series adds full support for the LPC (Low Pin Count) bridge, the
PCH (Platform Controller Hub), PCI devices like USB and SATA and more
CPU init support (turbo mode, etc.)
With this series, chromebook_link can use SATA and USB at the command
line.
Changes in v3:
- Add new patch to add ivybridge directory to Makefile
- Add new patch to fix SIZE_MAX compiler warning when using stdint.h
- Split out CONFIG_INTEL_CORE_ARCH removal patch
- Use exitsing disable_lapic() code instead of duplicating it
Changes in v2:
- Remove use of __PRE_RAM__ define
- Use existing lapic_setup() code instead of duplicating it
Simon Glass (8):
x86: Drop old CONFIG_INTEL_CORE_ARCH code
x86: Add LAPIC setup code
x86: Add init for model 206AX CPU
x86: Drop some msr functions that we don't support
x86: ivybridge: Add northbridge init functions
x86: config: Enable SPI for chromebook_link
x86: Add ivybridge directory to Makefile
Fix SIZE_MAX compiler warning when using stdint.h
arch/x86/cpu/Makefile | 3 +
arch/x86/cpu/interrupts.c | 28 --
arch/x86/cpu/ivybridge/Makefile | 2 +
arch/x86/cpu/ivybridge/bd82x6x.c | 8 +
arch/x86/cpu/ivybridge/model_206ax.c | 514 ++++++++++++++++++++++
arch/x86/cpu/ivybridge/northbridge.c | 188 ++++++++
arch/x86/cpu/lapic.c | 57 +++
arch/x86/include/asm/arch-ivybridge/bd82x6x.h | 3 +
arch/x86/include/asm/arch-ivybridge/model_206ax.h | 4 +
arch/x86/include/asm/arch-ivybridge/sandybridge.h | 13 +-
arch/x86/include/asm/lapic.h | 124 +++++-
arch/x86/include/asm/msr-index.h | 2 +
arch/x86/include/asm/msr.h | 11 -
arch/x86/include/asm/post.h | 1 +
include/configs/chromebook_link.h | 4 -
include/fdtdec.h | 1 +
include/linux/kernel.h | 2 +
lib/fdtdec.c | 1 +
18 files changed, 920 insertions(+), 46 deletions(-)
create mode 100644 arch/x86/cpu/ivybridge/model_206ax.c
create mode 100644 arch/x86/cpu/ivybridge/northbridge.c
create mode 100644 arch/x86/cpu/lapic.c
--
2.1.0.rc2.206.gedb03e5
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