[U-Boot] [PATCH 2/2] socfpga: correctly increment freeze_controller_base address

dinguyen at opensource.altera.com dinguyen at opensource.altera.com
Wed Nov 26 19:14:33 CET 2014


From: Dinh Nguyen <dinguyen at opensource.altera.com>

Correctly increment the base address of the freeze controller. And since
SYSMGR_FRZCTRL_VIOCTRL_SHIFT is not needed, remove it from the include file.

Signed-off-by: Dinh Nguyen <dinguyen at opensource.altera.com>
Cc: Vince Bridgers <vbridger at opensource.altera.com>
Cc: Chin Liang See <clsee at altera.com>
Cc: Marek Vasut <marex at denx.de>
Cc: Pavel Machek <pavel at denx.de>
Cc: Wolfgang Denk <wd at denx.de>
---
 arch/arm/cpu/armv7/socfpga/freeze_controller.c        | 6 ++----
 arch/arm/include/asm/arch-socfpga/freeze_controller.h | 1 -
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/arm/cpu/armv7/socfpga/freeze_controller.c b/arch/arm/cpu/armv7/socfpga/freeze_controller.c
index b8c9bce..0be643c 100644
--- a/arch/arm/cpu/armv7/socfpga/freeze_controller.c
+++ b/arch/arm/cpu/armv7/socfpga/freeze_controller.c
@@ -38,8 +38,7 @@ void sys_mgr_frzctrl_freeze_req(void)
 	/* Freeze channel 0 to 2 */
 	for (channel_id = 0; channel_id <= 2; channel_id++) {
 		ioctrl_reg_offset = (u32)(
-			&freeze_controller_base->vioctrl +
-			(channel_id << SYSMGR_FRZCTRL_VIOCTRL_SHIFT));
+			&freeze_controller_base->vioctrl + channel_id);
 
 		/*
 		 * Assert active low enrnsl, plniotri
@@ -120,8 +119,7 @@ void sys_mgr_frzctrl_thaw_req(void)
 	/* Thaw channel 0 to 2 */
 	for (channel_id = 0; channel_id <= 2; channel_id++) {
 		ioctrl_reg_offset
-			= (u32)(&freeze_controller_base->vioctrl
-				+ (channel_id << SYSMGR_FRZCTRL_VIOCTRL_SHIFT));
+			= (u32)(&freeze_controller_base->vioctrl + channel_id);
 
 		/*
 		 * Assert active low bhniotri signal and
diff --git a/arch/arm/include/asm/arch-socfpga/freeze_controller.h b/arch/arm/include/asm/arch-socfpga/freeze_controller.h
index 120f20e..f19ad87 100644
--- a/arch/arm/include/asm/arch-socfpga/freeze_controller.h
+++ b/arch/arm/include/asm/arch-socfpga/freeze_controller.h
@@ -42,7 +42,6 @@ typedef enum {
 #define SYSMGR_FRZCTRL_HWCTRL_VIO1REQ_MASK 0x00000001
 #define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_FROZEN 0x2
 #define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_THAWED 0x1
-#define SYSMGR_FRZCTRL_VIOCTRL_SHIFT 0x2
 
 void sys_mgr_frzctrl_freeze_req(void);
 void sys_mgr_frzctrl_thaw_req(void);
-- 
2.0.3



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