[U-Boot] [PATCH v3 03/10] ARM: sun6i: Add base address for the new controllers in A31
Chen-Yu Tsai
wens at csie.org
Fri Oct 3 14:16:23 CEST 2014
From: Oliver Schinagl <oliver at schinagl.nl>
A31 has several new and changed memory address. This patch adds them.
Signed-off-by: Oliver Schinagl <oliver at schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede at redhat.com>
Signed-off-by: Chen-Yu Tsai <wens at csie.org>
Acked-by: Ian Campbell <ijc at hellion.org.uk>
---
arch/arm/include/asm/arch-sunxi/cpu.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h
index a987e51d..313e6c8 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu.h
@@ -95,6 +95,11 @@
#define SUNXI_MALI400_BASE 0x01c40000
#define SUNXI_GMAC_BASE 0x01c50000
+#define SUNXI_DRAM_COM_BASE 0x01c62000
+#define SUNXI_DRAM_CTL_BASE 0x01c63000
+#define SUNXI_DRAM_PHY_CH1_BASE 0x01c65000
+#define SUNXI_DRAM_PHY_CH2_BASE 0x01c66000
+
/* module sram */
#define SUNXI_SRAM_C_BASE 0x01d00000
@@ -105,6 +110,10 @@
#define SUNXI_MP_BASE 0x01e80000
#define SUNXI_AVG_BASE 0x01ea0000
+#define SUNXI_PRCM_BASE 0x01f01400
+#define SUNXI_R_PIO_BASE 0x01f02c00
+#define SUNXI_P2WI_BASE 0x01f03400
+
/* CoreSight Debug Module */
#define SUNXI_CSDM_BASE 0x3f500000
--
2.1.1
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