[U-Boot] Fw: [PATCH 1/2][v3] fsl_sec: Add hardware accelerated SHA256 and SHA1

[Ruchika Gupta]

Th message bounced back due to some encoding issue. Forwarding the reply again.

________________________________________
From: Gupta Ruchika-R66431
Sent: Wednesday, October 15, 2014 2:32 PM
To: Simon Glass
Cc: U-Boot Mailing List; Sun York-R58495
Subject: RE: [U-Boot] [PATCH 1/2][v3] fsl_sec: Add hardware accelerated SHA256 and SHA1

Hi Simon,

I have defined the functions for hardware acceleration  which are already present in hash.c for Freescale platforms.

In hash.c
static struct hash_algo hash_algo[] = {
        /*
         * CONFIG_SHA_HW_ACCEL is defined if hardware acceleration is
         * available.
         */
#ifdef CONFIG_SHA_HW_ACCEL
        {
                "sha1",
                SHA1_SUM_LEN,
                hw_sha1,
                CHUNKSZ_SHA1,
        }, {
                "sha256",
                SHA256_SUM_LEN,
                hw_sha256,
                CHUNKSZ_SHA256,
        },
#endif
        /*

In the patch below, I have added defined the above functions for Freescale platforms.

+void hw_sha256(const unsigned char *pbuf, unsigned int buf_len,
+                       unsigned char *pout, unsigned int chunk_size)
+{
+       if (caam_hash(pbuf, buf_len, pout, SHA256))
+               printf("CAAM was not setup properly or it is faulty\n");
+}
+
+void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
+                       unsigned char *pout, unsigned int chunk_size)
+{
+       if (caam_hash(pbuf, buf_len, pout, SHA1))
+               printf("CAAM was not setup properly or it is faulty\n");
+}

Regards,
Ruchika

> -----Original Message-----
> From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
> Sent: Wednesday, October 15, 2014 12:56 PM
> To: Gupta Ruchika-R66431
> Cc: U-Boot Mailing List; Sun York-R58495
> Subject: Re: [U-Boot] [PATCH 1/2][v3] fsl_sec: Add hardware accelerated
> SHA256 and SHA1
>
> Hi,>
> On 15 October 2014 08:05, Ruchika Gupta <ruchika.gupta at freescale.com> wrote:
> > SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
> > The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
> > The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to enable
> > initialization of this hardware IP.
> >
> > Signed-off-by: Ruchika Gupta <ruchika.gupta at freescale.com>
> > CC: York Sun <yorksun at freescale.com>
> > ---
> > Changes from v2:
> > CAAM init was earlier enabled by default for all platforms with SEC > 4.
> > Restricting it to platforms which want to enable CAAM
> >
> > Changes from v1:
> > Added a common function run_descriptor_jr to avoid repetition of
> > common code
>
> Are you able to plumb this into hash.c? See hash_algo[].
>
> Regards,
> Simon