[U-Boot] [PATCH v1 03/10] arm, at91: add missing ddr2 cr register MPDDRC_CR_EBISHARE define

[Andreas Bießmann]

Dear Heiko,

On 01.10.14 07:54, Heiko Schocher wrote:
> Signed-off-by: Heiko Schocher <hs at denx.de>
> Cc: Andreas Bießmann <andreas.devel at googlemail.com>
> Cc: Bo Shen <voice.shen at atmel.com>
> ---
>  arch/arm/include/asm/arch-at91/atmel_mpddrc.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/include/asm/arch-at91/atmel_mpddrc.h b/arch/arm/include/asm/arch-at91/atmel_mpddrc.h
> index 5741f6e..bd403d2 100644
> --- a/arch/arm/include/asm/arch-at91/atmel_mpddrc.h
> +++ b/arch/arm/include/asm/arch-at91/atmel_mpddrc.h
> @@ -57,6 +57,7 @@ int ddr2_init(const unsigned int ram_address,
>  #define ATMEL_MPDDRC_CR_DIC_DS			(0x1 << 8)
>  #define ATMEL_MPDDRC_CR_DIS_DLL			(0x1 << 9)
>  #define ATMEL_MPDDRC_CR_OCD_DEFAULT		(0x7 << 12)
> +#define ATMEL_MPDDRC_CR_EBISHARE		(0x1 << 16)

'EBISHARE' is much more expressive, but the datasheet (sama5d34) names
this bit 'DQMS'. How about DQMS_SHARED?

>  #define ATMEL_MPDDRC_CR_ENRDM_ON		(0x1 << 17)
>  #define ATMEL_MPDDRC_CR_NB_8BANKS		(0x1 << 20)
>  #define ATMEL_MPDDRC_CR_NDQS_DISABLED		(0x1 << 21)
>