[U-Boot] [PATCH 2/3] Exynos5800: Add support for Exynos5800

Hyungwon Hwang human.hwang at samsung.com
Fri Oct 31 09:41:01 CET 2014


The gpios of Exynos5800 are different from that of Exynos5420. This patch adds
the gpio information and table of Exynos5800.

Change-Id: Ic609973ab531e2b6ee9a68cfec0b6b9571f203a8
Signed-off-by: Hyungwon Hwang <human.hwang at samsung.com>
---
 arch/arm/include/asm/arch-exynos/gpio.h | 31 +++++++++++++++++++++++++++++--
 drivers/gpio/s5p_gpio.c                 |  4 +++-
 2 files changed, 32 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h
index 431ae3a..8f82ef0 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -1368,11 +1368,21 @@ static struct gpio_info exynos5420_gpio_data[EXYNOS5420_GPIO_NUM_PARTS] = {
 	{ EXYNOS5420_GPIO_PART5_BASE, EXYNOS5420_GPIO_MAX_PORT },
 };
 
+#define EXYNOS5800_GPIO_NUM_PARTS	4
+static struct gpio_info exynos5800_gpio_data[EXYNOS5800_GPIO_NUM_PARTS] = {
+	{ EXYNOS5420_GPIO_PART1_BASE, EXYNOS5420_GPIO_MAX_PORT_PART_1 },
+	{ EXYNOS5420_GPIO_PART2_BASE, EXYNOS5420_GPIO_MAX_PORT_PART_2 },
+	{ EXYNOS5420_GPIO_PART3_BASE, EXYNOS5420_GPIO_MAX_PORT_PART_3 },
+	{ EXYNOS5420_GPIO_PART4_BASE, EXYNOS5420_GPIO_MAX_PORT_PART_4 },
+};
+
 static inline struct gpio_info *get_gpio_data(void)
 {
 	if (cpu_is_exynos5()) {
-		if (proid_is_exynos5420() || proid_is_exynos5800())
+		if (proid_is_exynos5420())
 			return exynos5420_gpio_data;
+		else if (proid_is_exynos5800())
+			return exynos5800_gpio_data;
 		else
 			return exynos5_gpio_data;
 	} else if (cpu_is_exynos4()) {
@@ -1388,8 +1398,10 @@ static inline struct gpio_info *get_gpio_data(void)
 static inline unsigned int get_bank_num(void)
 {
 	if (cpu_is_exynos5()) {
-		if (proid_is_exynos5420() || proid_is_exynos5800())
+		if (proid_is_exynos5420())
 			return EXYNOS5420_GPIO_NUM_PARTS;
+		if (proid_is_exynos5800())
+			return EXYNOS5800_GPIO_NUM_PARTS;
 		else
 			return EXYNOS5_GPIO_NUM_PARTS;
 	} else if (cpu_is_exynos4()) {
@@ -1493,6 +1505,21 @@ static const struct gpio_name_num_table exynos5420_gpio_table[] = {
 	{ 0 }
 };
 
+static const struct gpio_name_num_table exynos5800_gpio_table[] = {
+	GPIO_ENTRY('x', EXYNOS5420_GPIO_X00, EXYNOS5420_GPIO_C00, 0),
+	GPIO_ENTRY('c', EXYNOS5420_GPIO_C00, EXYNOS5420_GPIO_D10, 0),
+	GPIO_ENTRY('d', EXYNOS5420_GPIO_D10, EXYNOS5420_GPIO_Y00, 0),
+	GPIO_ENTRY('y', EXYNOS5420_GPIO_Y00, EXYNOS5420_GPIO_E00, 0),
+	GPIO_ENTRY('e', EXYNOS5420_GPIO_E00, EXYNOS5420_GPIO_F00, 0),
+	GPIO_ENTRY('f', EXYNOS5420_GPIO_F00, EXYNOS5420_GPIO_G00, 0),
+	GPIO_ENTRY('g', EXYNOS5420_GPIO_G00, EXYNOS5420_GPIO_J40, 0),
+	GPIO_ENTRY('j', EXYNOS5420_GPIO_J40, EXYNOS5420_GPIO_A00, 0),
+	GPIO_ENTRY('a', EXYNOS5420_GPIO_A00, EXYNOS5420_GPIO_B00, 0),
+	GPIO_ENTRY('b', EXYNOS5420_GPIO_B00, EXYNOS5420_GPIO_H00, 0),
+	GPIO_ENTRY('h', EXYNOS5420_GPIO_H00, EXYNOS5420_GPIO_Z0, 0),
+	{ 0 }
+};
+
 void gpio_cfg_pin(int gpio, int cfg);
 void gpio_set_pull(int gpio, int mode);
 void gpio_set_drv(int gpio, int mode);
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index bcf44eb..bed7cd7 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -57,11 +57,13 @@ static inline int s5p_name_to_gpio(const char *name)
 	 */
 #if defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5)
 	if (cpu_is_exynos5()) {
-		if (proid_is_exynos5420() || proid_is_exynos5800()) {
+		if (proid_is_exynos5420()) {
 			tabp = exynos5420_gpio_table;
 			irregular_bank_name = 'y';
 			irregular_set_number = '7';
 			irregular_bank_base = EXYNOS5420_GPIO_Y70;
+		} else if (proid_is_exynos5800()) {
+			tabp = exynos5800_gpio_table;
 		} else {
 			tabp = exynos5_gpio_table;
 			irregular_bank_name = 'c';
-- 
1.8.3.2



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