[U-Boot] [PATCH] arm: socfpga: Add example config entry for EPCS/EPCQ SPI

[Jagan Teki]

On 31 October 2014 14:36, Marek Vasut <marex at denx.de> wrote:
> On Friday, October 31, 2014 at 08:09:21 AM, Jagan Teki wrote:
>> On 30 October 2014 22:59, Marek Vasut <marex at denx.de> wrote:
>> > On Thursday, October 30, 2014 at 03:38:40 PM, Jagan Teki wrote:
>> >> On 30 October 2014 15:00, Marek Vasut <marex at denx.de> wrote:
>> >> > Add example config file entry for the Altera SPI controller. This SPI
>> >> > controller can also, under special conditions, be used to operate the
>> >> > EPCS/EPCQ SPI NOR.
>> >> >
>> >> > Signed-off-by: Marek Vasut <marex at denx.de>
>> >> > Cc: Chin Liang See <clsee at altera.com>
>> >> > Cc: Dinh Nguyen <dinguyen at opensource.altera.com>
>> >> > Cc: Vince Bridgers <vbridger at altera.com>
>> >> > Cc: Pavel Machek <pavel at denx.de>
>> >> > Cc: Stefan Roese <sr at denx.de>
>> >> > ---
>> >> >
>> >> >  include/configs/socfpga_common.h | 19 +++++++++++++++++++
>> >> >  1 file changed, 19 insertions(+)
>> >> >
>> >> > diff --git a/include/configs/socfpga_common.h
>> >> > b/include/configs/socfpga_common.h index 83a1bcd..1df886b 100644
>> >> > --- a/include/configs/socfpga_common.h
>> >> > +++ b/include/configs/socfpga_common.h
>> >> > @@ -79,6 +79,25 @@
>> >> >
>> >> >  #define CONFIG_SYS_PL310_BASE          SOCFPGA_MPUL2_ADDRESS
>> >> >
>> >> >  /*
>> >> >
>> >> > + * EPCS/EPCQx1 Serial Flash Controller
>> >> > + */
>> >> > +#ifdef CONFIG_ALTERA_SPI
>> >> > +#define CONFIG_CMD_SPI
>> >> > +#define CONFIG_CMD_SF
>> >> > +#define CONFIG_SF_DEFAULT_SPEED                30000000
>> >> > +#define CONFIG_SPI_FLASH
>> >> > +#define CONFIG_SPI_FLASH_STMICRO
>> >> > +#define CONFIG_SPI_FLASH_BAR
>> >> > +/*
>> >> > + * The base address is configurable in QSys, each board must specify
>> >> > the + * base address based on it's particular FPGA configuration.
>> >> > Please note + * that the address here is incremented by  0x400  from
>> >> > the Base address + * selected in QSys, since the SPI registers are at
>> >> > offset +0x400. + * #define CONFIG_SYS_SPI_BASE         0xff240400
>> >>
>> >> So each board-specific config header will define CONFIG_SYS_SPI_BASE is
>> >> it? for using ALTERA_SPI
>> >
>> > Yes, the address is not fixed, since this is FPGA IP.
>>
>> May be use conditional ifdef with CONFIG_SYS_SPI_BASE instead of
>> CONFIG_ALTERA_SPI
>> so who ever use SPI on their board will define CONFIG_SYS_SPI_BASE config.
>
> You can have different SPI controllers enabled on the SoCFPGA, so enabling
> CONFIG_ALTERA_SPI explicitly in case CONFIG_SYS_SPI_BASE is defined is a very
> bad idea.

In that case - It's true.

Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki at gmail.com>

thanks!
-- 
Jagan.