[U-Boot] [PATCH v2] imx: ddr: Move mx6q_4x_mt41j128.cfg to mx6sabresd board dir

Fabio Estevam festevam at gmail.com
Tue Sep 2 00:27:22 CEST 2014


Hi Wolfgang,

On Mon, Sep 1, 2014 at 4:24 PM, Wolfgang Denk <wd at denx.de> wrote:
> Dear Nitin Garg,
>
> In message <1409581243-12695-1-git-send-email-nitin.garg at freescale.com> you wrote:
>> Move board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg to
>> board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg as this is
>> was designed for the mx6sabresd board. This also updates the
>> cgtqmx6qeval which makes use of this configuration.
>
> I've made my mind up.  I hereby NAK this patch, as it would basically
> revert Fabio Estevam's commit af7ec0b which moved the originally
> board-specific code to a common place:
>
>         commit af7ec0b0582f658873713c311497626c571f3b31
>         Author: Fabio Estevam <fabio.estevam at freescale.com>
>         Date:   Thu Sep 13 03:18:19 2012 +0000
>
>         mx6q: Factor out common DDR3 init code
>
>         Factor out common DDR3 initialization code, allowing easier
>         maintainance of such scripts.
>
>         Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
>
> Fabio's intention was a good one, as is proven by the re-use of this
> code by other boards.

Let me provide some background on the reason I sent that patch: at
that time we had the same DDR3 init code for several boards, such as
mx6qsabresd, nitrogen, sabrelite, so I wanted to avoid duplicating the
same init for several boards.

After sometime, each board used to followed its own specific settings,
as the DDR3 init is very dependant on board layout and some
optimizations that are valid for one board does not apply to others.
Each board developer has to be really careful about properly
configuring DDR in order to achieve stability, so re-use of the DCD
settings should be done really carefully.

As it stands today only mx6qsabresd and congatec share the same script.

I think Nitin's patch goes in the right direction, as it makes clearer
for other developers that the DDR specific settings are optmized for
mx6qsabresd only. Of course people can re-use it, like congatec board
does today, but if in the future we find some more optimal settings
for this board we should apply it to mx6sabresd, but we really don't
know the consequences into other hardware. So they have been warned
:-)

Moving forward we should really get rid of this DCD syntax and move to
SPL style.

Regards,

Fabio Estevam


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