[U-Boot] [PATCH 4/7] ARM: sun6i: Add clock support

[Chen-Yu Tsai]

On Mon, Sep 22, 2014 at 2:35 AM, Ian Campbell <ijc at hellion.org.uk> wrote:
> On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
>
>> +#ifdef CONFIG_SPL_BUILD
>
> Since there is no SPL support this is dead code right now, correct?

This was part of Hans' attempt to support SPL. It was not finished.

> I'm wondering whether we should leave it out of mainline until the SPL
> stuff is done, so SPL will be upstreamed all at once. What do others
> think?

Sounds reasonable.

>> +     /* Set PLL ldo voltage without this PLL6 does not work properly */
>
> Is "this" here the doing it 3 times bit? If that's deliberate then
> please say so explicitly. e.g. "Set PLL LDO voltage 3 times, without ...
> etc"), if it's not deliberate then please fix ;-)

Hans, if you could enlighten us? :)

> I'm assuming this is one of those "no docs, allwinner code did it but
> nobody knows why it works" scenarios. Of course if the reason is
> known/doc'd then please add a reference.

I looked at the boot1 sources we recently got.

First it sets PRCM_PLL_CTRL_LDO_KEY to enable write access to the other
values.

Then it sets PRCM_PLL_CTRL_IN_PWR_HIGH (which is the default) and
PRCM_PLL_CTRL_LDO_OUT_L(1140) in one call.

Then it busy loops for some time to wait for it to stabilize.

>> +     writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN |
>> +             PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) |
>> +             PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1);
>> +     writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN |
>> +             PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) |
>> +             PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1);
>> +     writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN |
>> +             PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140),
>> +             &prcm->pll_ctrl1);
> [...]

ChenYu