[U-Boot] [PATCH 4/7] ARM: sun6i: Add clock support

[Ian Campbell]

On Mon, 2014-09-22 at 20:47 +0800, Chen-Yu Tsai wrote:
> On Mon, Sep 22, 2014 at 2:35 AM, Ian Campbell <ijc at hellion.org.uk> wrote:
> > On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
> >> +     /* Set PLL ldo voltage without this PLL6 does not work properly */
> >
> > Is "this" here the doing it 3 times bit? If that's deliberate then
> > please say so explicitly. e.g. "Set PLL LDO voltage 3 times, without ...
> > etc"), if it's not deliberate then please fix ;-)
> 
> Hans, if you could enlighten us? :)
> 
> > I'm assuming this is one of those "no docs, allwinner code did it but
> > nobody knows why it works" scenarios. Of course if the reason is
> > known/doc'd then please add a reference.
> 
> I looked at the boot1 sources we recently got.
> 
> First it sets PRCM_PLL_CTRL_LDO_KEY to enable write access to the other
> values.
> 
> Then it sets PRCM_PLL_CTRL_IN_PWR_HIGH (which is the default) and
> PRCM_PLL_CTRL_LDO_OUT_L(1140) in one call.
> 
> Then it busy loops for some time to wait for it to stabilize.

My guess would be that 3 writes happens to cause enough time to pass
that things have (often!) stabilised, which is certainly not as good as
an explicit waiting busy loop. But as you say lets see what Hans says.

> 
> >> +     writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN |
> >> +             PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) |
> >> +             PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1);
> >> +     writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN |
> >> +             PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) |
> >> +             PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1);
> >> +     writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN |
> >> +             PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140),
> >> +             &prcm->pll_ctrl1);
> > [...]
> 
> ChenYu
>