[U-Boot] [PATCH 07/10] sunxi: Fix end of kernel memory alignment for A33

[Hans de Goede]

Hi,

On 15-04-15 21:57, Ian Campbell wrote:
> On Tue, 2015-04-14 at 18:06 +0200, Hans de Goede wrote:
>> For unknown reasons the A33 needs the end of the memory we report to the
>> kernel to be aligned to a multiple of 4 MiB.
>
> Do you really mean "the A33 needs" (as in the processor itself) or do
> you actually mean "the A33 kernel port"?
>
> If the latter than can't that be investigated/fixed instead of hacked
> here? That would be far more preferable.

I mean the former, it seems that the SoC itself cannot handle dram
ranges with different cache policies which are not aligned to 4 MiB,
at least that is my WAG what is going on here.

I've been using an a23 dtb + generic multi-platform kernel for my testing
(as said before the a33 really is almost the same design), and that boots
fine without this alignment hack on an actual A23 device, so this is not
a kernel limitation.

I'm not entirely happy with this semi-magic workaround either, but it
took me a day to find it, and then I tried to find a better solution /
more satisfying answer as to why for another day, so at this point
my vision on this is that we will just have to live with it.

Regards,

Hans