[U-Boot] [PATCH 2/4] drivers:usb:fsl: Add XHCI driver support

[Ramneek Mehresh]

> -----Original Message-----
> From: Marek Vasut [mailto:marex at denx.de]
> Sent: Wednesday, April 22, 2015 5:17 PM
> To: Mehresh Ramneek-B31383
> Cc: u-boot at lists.denx.de
> Subject: Re: [PATCH 2/4] drivers:usb:fsl: Add XHCI driver support
> 
> On Wednesday, April 22, 2015 at 08:49:41 AM, Ramneek Mehresh wrote:
> > Add xhci driver support for all FSL socs
> >
> > Signed-off-by: Ramneek Mehresh <ramneek.mehresh at freescale.com>
> 
> Hi!
> 
> [...]
> 
> > diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
> > new file mode 100644 index 0000000..9d89313
> > --- /dev/null
> > +++ b/drivers/usb/host/xhci-fsl.c
> > @@ -0,0 +1,110 @@
> > +/*
> > + * Copyright 2015 Freescale Semiconductor, Inc.
> > + *
> > + * FSL USB HOST xHCI Controller
> > + *
> > + * Author: Ramneek Mehresh<ramneek.mehresh at freescale.com>
> > + *
> > + * SPDX-License-Identifier:	GPL-2.0+
> > + */
> > +
> > +#include <common.h>
> > +#include <usb.h>
> > +#include <asm-generic/errno.h>
> > +/*#include <asm/arch/cpu.h>*/
> > +/*#include <asm/arch/sys_proto.h>*/
> 
> Remove these please .
> 
Oops, my bad, will do

> > +#include <linux/compat.h>
> > +#include <linux/usb/xhci-fsl.h>
> > +#include <linux/usb/dwc3.h>
> > +#include "xhci.h"
> > +
> > +/* Declare global data pointer */
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +static struct fsl_xhci fsl_xhci;
> > +
> 
> This will do:
> 
agreed
> __weak int board_usb_init(...)
> {
> 	return 0;
> }
> 
> > +inline int __board_usb_init(int index, enum usb_init_type init) {
> > +	return 0;
> > +}
> > +
> > +int board_usb_init(int index, enum usb_init_type init)
> > +	__attribute__((weak, alias("__board_usb_init")));
> 
> Drop the above, just use __weak .
> 
> > +void usb_phy_reset(struct dwc3 *dwc3_reg) {
> > +	/* Assert USB3 PHY reset */
> > +	setbits_le32(&dwc3_reg->g_usb3pipectl[0],
> > +DWC3_GUSB3PIPECTL_PHYSOFTRST);
> > +
> > +	/* Assert USB2 PHY reset */
> > +	setbits_le32(&dwc3_reg->g_usb2phycfg,
> DWC3_GUSB2PHYCFG_PHYSOFTRST);
> > +
> > +	mdelay(200);
> > +
> > +	/* Clear USB3 PHY reset */
> > +	clrbits_le32(&dwc3_reg->g_usb3pipectl[0],
> > +DWC3_GUSB3PIPECTL_PHYSOFTRST);
> > +
> > +	/* Clear USB2 PHY reset */
> > +	clrbits_le32(&dwc3_reg->g_usb2phycfg,
> DWC3_GUSB2PHYCFG_PHYSOFTRST);
> > +}
> > +
> > +static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) {
> > +	int ret = 0;
> > +
> > +	ret = dwc3_core_init(fsl_xhci->dwc3_reg);
> > +	if (ret) {
> > +		debug("%s:failed to initialize core\n", __func__);
> > +		return ret;
> > +	}
> > +
> > +	/* We are hard-coding DWC3 core to Host Mode */
> > +	dwc3_set_mode(fsl_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
> > +
> > +	return ret;
> > +}
> > +
> > +static int fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci) {
> > +	/* Currently fsl socs do not support PHY shutdown from
> > +	 * sw. But this support may be added in future socs */
> 
> Multiline comment should be in this form:
> 
Will correct
> /*
>  * foo
>  * bar
>  */
> 
> > +	return 0;
> > +}
> > +
> > +int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct
> > +xhci_hcor
> > **hcor) +{
> > +	struct fsl_xhci *ctx = &fsl_xhci;
> > +	int ret = 0;
> > +
> > +	ctx->hcd = (struct xhci_hccr *)FSL_XHCI_BASE;
> > +	ctx->dwc3_reg = (struct dwc3 *)(FSL_XHCI_BASE +
> DWC3_REG_OFFSET);
> > +
> > +	ret = board_usb_init(index, USB_INIT_HOST);
> > +	if (ret != 0) {
> > +		puts("Failed to initialize board for USB\n");
> > +		return ret;
> > +	}
> > +
> > +	ret = fsl_xhci_core_init(ctx);
> > +	if (ret < 0) {
> > +		puts("Failed to initialize xhci\n");
> > +		return ret;
> > +	}
> > +
> > +	*hccr = (struct xhci_hccr *)(FSL_XHCI_BASE);
> > +	*hcor = (struct xhci_hcor *)((uint32_t) *hccr
> > +				+ HC_LENGTH(xhci_readl(&(*hccr)-
> >cr_capbase)));
> > +
> > +	debug("fsl-xhci: init hccr %x and hcor %x hc_length %d\n",
> > +	      (uint32_t)*hccr, (uint32_t)*hcor,
> > +	      (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
> > +
> > +	return ret;
> > +}
> > +
> > +void xhci_hcd_stop(int index)
> > +{
> > +	struct fsl_xhci *ctx = &fsl_xhci;
> > +
> > +	fsl_xhci_core_exit(ctx);
> > +}
> > diff --git a/include/linux/usb/xhci-fsl.h
> > b/include/linux/usb/xhci-fsl.h new file mode 100644 index
> > 0000000..1751c7a
> > --- /dev/null
> > +++ b/include/linux/usb/xhci-fsl.h
> > @@ -0,0 +1,58 @@
> > +/*
> > + * Copyright 2015 Freescale Semiconductor, Inc.
> > + *
> > + * FSL USB HOST xHCI Controller
> > + *
> > + * Author: Ramneek Mehresh<ramneek.mehresh at freescale.com>
> > + *
> > + * SPDX-License-Identifier:	GPL-2.0+
> > + */
> > +
> > +#ifndef _ASM_ARCH_XHCI_FSL_H_
> > +#define _ASM_ARCH_XHCI_FSL_H_
> > +
> > +/* Default to the FSL XHCI defines */ #define FSL_XHCI_BASE 0x3100000
> > +#define FSL_OCP1_SCP_BASE 0x4a084c00 #define
> FSL_OTG_WRAPPER_BASE
> > +0x4A020000
> 
> This should be in CPU-specific file I guess, not in IP-specific one.
> 
Agreed, let me check which file can be used for this
> [...]