[U-Boot] [PATCH 3/5] x86: queensbay: Support pre-relocation dm pci

[Simon Glass]

Hi Bin,

On 27 July 2015 at 01:33, Bin Meng <bmeng.cn at gmail.com> wrote:
> Increase CONFIG_MALLOC_F_LEN so that dm pci does not fail with -ENOMEM
> before relocation. This makes pci uart work again on Intel Crown Bay.
>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> ---
>
>  arch/x86/cpu/queensbay/Kconfig |  3 +++
>  arch/x86/cpu/queensbay/tnc.c   | 13 +++++++++++++
>  arch/x86/dts/crownbay.dts      |  2 --
>  3 files changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
> index fbf85f2..8eb619c 100644
> --- a/arch/x86/cpu/queensbay/Kconfig
> +++ b/arch/x86/cpu/queensbay/Kconfig
> @@ -42,4 +42,7 @@ config CPU_ADDR_BITS
>         int
>         default 32
>
> +config SYS_MALLOC_F_LEN
> +       default 0x8000

32KB? Wow that's a huge amount. How much does it actually use? Perhaps
we should change PCI so that it respects the u-boot,dm-pre-reloc
property?

> +
>  endif
> diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
> index de50893..322534b 100644
> --- a/arch/x86/cpu/queensbay/tnc.c
> +++ b/arch/x86/cpu/queensbay/tnc.c
> @@ -13,6 +13,7 @@
>  #include <asm/arch/tnc.h>
>  #include <asm/fsp/fsp_support.h>
>  #include <asm/processor.h>
> +#include <dm.h>
>
>  static void unprotect_spi_flash(void)
>  {
> @@ -36,6 +37,18 @@ int arch_cpu_init(void)
>         if (ret)
>                 return ret;
>
> +       return 0;
> +}
> +
> +int arch_cpu_init_dm(void)
> +{
> +       struct udevice *dev;
> +       int ret;
> +
> +       ret = uclass_first_device(UCLASS_PCI, &dev);
> +       if (ret)
> +               return ret;
> +
>         unprotect_spi_flash();
>
>         return 0;
> diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
> index 3af9cc3..2714370 100644
> --- a/arch/x86/dts/crownbay.dts
> +++ b/arch/x86/dts/crownbay.dts
> @@ -100,13 +100,11 @@
>                 pcie at 17,0 {
>                         #address-cells = <3>;
>                         #size-cells = <2>;
> -                       compatible = "intel,pci";
>                         device_type = "pci";
>
>                         topcliff at 0,0 {
>                                 #address-cells = <3>;
>                                 #size-cells = <2>;
> -                               compatible = "intel,pci";
>                                 device_type = "pci";
>
>                                 pciuart0: uart at a,1 {
> --
> 1.8.2.1
>

Regards,
Simon