[U-Boot] [PATCH 01/15] pci: Add a constant for an invalid interrupt

[Simon Glass]

On 28 July 2015 at 01:46, Bin Meng <bmeng.cn at gmail.com> wrote:
> On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass <sjg at chromium.org> wrote:
>> Rather than using 0xff in the code, add a constant.
>>
>> Signed-off-by: Simon Glass <sjg at chromium.org>
>> ---
>>
>>  drivers/pci/pci.c | 3 ++-
>>  include/pci.h     | 2 ++
>>  2 files changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
>> index 157491c..9dd245c 100644
>> --- a/drivers/pci/pci.c
>> +++ b/drivers/pci/pci.c
>> @@ -269,7 +269,8 @@ int pci_hose_config_device(struct pci_controller *hose,
>>         /* Disable interrupt line, if device says it wants to use interrupts */
>>         pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin);
>>         if (pin != 0) {
>> -               pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 0xff);
>> +               pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE,
>> +                                          PCI_INTERRUPT_LINE_DISABLE);
>>         }
>>
>>         pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &old_command);
>> diff --git a/include/pci.h b/include/pci.h
>> index 94bca97..26cd80b 100644
>> --- a/include/pci.h
>> +++ b/include/pci.h
>> @@ -228,6 +228,8 @@
>>  #define PCI_MIN_GNT            0x3e    /* 8 bits */
>>  #define PCI_MAX_LAT            0x3f    /* 8 bits */
>>
>> +#define PCI_INTERRUPT_LINE_DISABLE     0xff
>> +
>>  /* Header type 1 (PCI-to-PCI bridges) */
>>  #define PCI_PRIMARY_BUS                0x18    /* Primary bus number */
>>  #define PCI_SECONDARY_BUS      0x19    /* Secondary bus number */
>> --
>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>

Applied to u-boot-x86.