[U-Boot] [PATCH 10/15] x86: dts: Fix typo in intel, irq-router.txt

Simon Glass sjg at chromium.org
Mon Aug 3 01:38:15 CEST 2015


On 28 July 2015 at 01:48, Bin Meng <bmeng.cn at gmail.com> wrote:
> On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass <sjg at chromium.org> wrote:
>> Fix a small typo in this binding file.
>>
>> Signed-off-by: Simon Glass <sjg at chromium.org>
>> ---
>>
>>  doc/device-tree-bindings/misc/intel,irq-router.txt | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/doc/device-tree-bindings/misc/intel,irq-router.txt b/doc/device-tree-bindings/misc/intel,irq-router.txt
>> index 598b4b1..e4d8ead 100644
>> --- a/doc/device-tree-bindings/misc/intel,irq-router.txt
>> +++ b/doc/device-tree-bindings/misc/intel,irq-router.txt
>> @@ -17,8 +17,8 @@ Required properties :
>>  - intel,pirq-link : Specifies the PIRQ link information with two cells. The
>>      first cell is the register offset that controls the first PIRQ link routing.
>>      The second cell is the total number of PIRQ links the router supports.
>> -- intel,pirq-mask : Specifies the IRQ mask reprenting the 16 IRQs in 8259 PIC.
>> -    Bit N is 1 means IRQ N is available to be routed.
>> +- intel,pirq-mask : Specifies the IRQ mask representing the 16 IRQs in the
>> +    8259 PIC. Bit N is 1 means IRQ N is available to be routed.
>>  - intel,pirq-routing : Specifies all PCI devices' IRQ routing information,
>>     encoded as 3 cells a group for a device. The first cell is the device's PCI
>>     bus number, device number and function number encoding with PCI_BDF() macro.
>> --
>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>

Applied to u-boot-x86.


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