[U-Boot] [PATCH 1/2] gpio: Add DW APB GPIO driver
Marek Vasut
marex at denx.de
Mon Aug 3 02:16:24 CEST 2015
On Monday, August 03, 2015 at 01:38:28 AM, Simon Glass wrote:
> Hi Marek,
Hi Simon,
[...]
> >> > + if (!fdtdec_get_bool(blob, node, "gpio-controller"))
> >> > + continue;
> >> > +
> >> > + plat = NULL;
> >> > + plat = calloc(1, sizeof(*plat));
> >>
> >> I suppose this should use devm_alloc() now.
> >
> > Is that even in u-boot/master ? Also, I'm not sure it's a good idea to
> > put this in if I use this driver in SPL.
>
> Yes it's very new. Only in dm/master.
>
> It's only compiled in when enabled, so you can still use it in SPL.
>
> Up to you. At some point I think we should convert all driver allocs
> to use devm so that we know what allocation is going on.
When is this landing in master ? I don't mind either way, but I can do
a linting pass on the socfpga when things settle down too.
> >> > + if (!plat)
> >> > + return -ENOMEM;
> >> > +
> >> > + plat->base = base;
> >> > + plat->bank = bank;
> >> > + plat->pins = fdtdec_get_int(blob, node,
> >> > "snps,nr-gpios", 0); + snprintf(plat->name,
> >> > sizeof(plat->name) - 1, "%s-bank%i-", + name,
> >> > bank);
> >>
> >> Why such a long name? That's going to be a pain to type in the 'gpio'
> >> command.
> >
> > Do you have a suggestion please ?
>
> A, B, C is good if you have <=26 banks. Tegra does that.
>
> Exynos does PA0, PA1, PB0, PC0, PC1, etc.
How do I identify which one is PA0/PA1/PA2 , shall I perform some transformation
on the register address of the GPIO block or example ? But how can I assure that
if the next SoCFPGA has these addresses completely different, these GPIO numbers
will be stable ? Isn't it better to be explicit about the GPIO block ID then ?
Also, remember that I have an FPGA in the same package, which has a lot of I/O.
> > Also, I can as well use "gpio <operation> N" , where N is a number.
What about this ? How does indexing the GPIOs with plain number fit into the
picture please ?
[...]
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