[U-Boot] [PATCH 4/5] x86: Explicitly trigger pci bus configuration with driver model

[Bin Meng]

Hi Simon,

On Mon, Aug 3, 2015 at 6:31 AM, Simon Glass <sjg at chromium.org> wrote:
> Hi Bin,
>
> On 27 July 2015 at 01:33, Bin Meng <bmeng.cn at gmail.com> wrote:
>> With driver model, probing pci bus is all done on a lazy basis,
>> as needed. On x86, pci bus is the fundamental device that needs
>> to work before any other peripherals. In order to have a working
>> pci before any other pci devices can be initialized, we need
>> explicitly trigger the pci bus configuration.
>>
>> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>> ---
>>
>>  common/board_r.c | 16 ++++++++++++++++
>>  1 file changed, 16 insertions(+)
>>
>> diff --git a/common/board_r.c b/common/board_r.c
>> index bf6c725..4263e47 100644
>> --- a/common/board_r.c
>> +++ b/common/board_r.c
>> @@ -233,6 +233,22 @@ static int initr_pci(void)
>>  {
>>  #ifndef CONFIG_DM_PCI
>>         pci_init();
>> +#else
>> +#ifdef CONFIG_X86
>> +       /*
>> +        * With driver model, probing pci bus is all done on a lazy basis,
>> +        * as needed. On x86, pci bus is the fundamental device that needs
>> +        * to work before any other peripherals. In order to have a working
>> +        * pci before any other pci devices can be initialized, we need
>> +        * explicitly trigger the pci bus configuration.
>> +        */
>> +       struct udevice *dev;
>> +       int ret;
>> +
>> +       ret = uclass_first_device(UCLASS_PCI, &dev);
>> +       if (ret)
>> +               return ret;
>
> Won't this happen anyway when you first access a PCI device?
>

Unfortunately no. The pci bus configuration will not be triggered when
calling pci config read/write.

[snip]

Regards,
Bin