[U-Boot] [Patch v3 2/2] lib/fdtdec: Fix compiling warning caused by changing fdt_addr_t type
York Sun
yorksun at freescale.com
Mon Aug 3 21:02:05 CEST 2015
fdt_addr_t is changed to phys_addr_t. The format in debug should be updated
to %pa to match the type.
Signed-off-by: York Sun <yorksun at freescale.com>
CC: Simon Glass <sjg at chromium.org>
---
Change log:
v3: split into a separated patch
drivers/pci/pci_tegra.c | 10 +++++-----
drivers/spi/fsl_dspi.c | 4 ++--
drivers/video/tegra.c | 2 +-
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index 67b5fdf..ebb959f 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -445,11 +445,11 @@ static int tegra_pcie_parse_dt_ranges(const void *fdt, int node,
}
debug("PCI regions:\n");
- debug(" I/O: %#x-%#x\n", pcie->io.start, pcie->io.end);
- debug(" non-prefetchable memory: %#x-%#x\n", pcie->mem.start,
- pcie->mem.end);
- debug(" prefetchable memory: %#x-%#x\n", pcie->prefetch.start,
- pcie->prefetch.end);
+ debug(" I/O: %pa-%pa\n", &pcie->io.start, &pcie->io.end);
+ debug(" non-prefetchable memory: %pa-%pa\n", &pcie->mem.start,
+ &pcie->mem.end);
+ debug(" prefetchable memory: %pa-%pa\n", &pcie->prefetch.start,
+ &pcie->prefetch.end);
return 0;
}
diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index 7928531..3881b2e 100644
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -664,8 +664,8 @@ static int fsl_dspi_ofdata_to_platdata(struct udevice *bus)
plat->speed_hz = fdtdec_get_int(blob,
node, "spi-max-frequency", FSL_DSPI_DEFAULT_SCK_FREQ);
- debug("DSPI: regs=0x%llx, max-frequency=%d, endianess=%s, num-cs=%d\n",
- (u64)plat->regs_addr, plat->speed_hz,
+ debug("DSPI: regs=%pa, max-frequency=%d, endianess=%s, num-cs=%d\n",
+ &plat->regs_addr, plat->speed_hz,
plat->flags & DSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le",
plat->num_chipselect);
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c
index b8f3431..33c6103 100644
--- a/drivers/video/tegra.c
+++ b/drivers/video/tegra.c
@@ -92,7 +92,7 @@ void lcd_ctrl_init(void *lcdbase)
/* Enable flushing after LCD writes if requested */
lcd_set_flush_dcache(config.cache_type & FDT_LCD_CACHE_FLUSH);
- debug("LCD frame buffer at %08X\n", disp_config->frame_buffer);
+ debug("LCD frame buffer at %pa\n", &disp_config->frame_buffer);
}
ulong calc_fbsize(void)
--
1.7.9.5
More information about the U-Boot
mailing list