[U-Boot] [PATCH 2/2] Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.

Marcel Ziswiler marcel at ziswiler.com
Wed Aug 5 16:19:50 CEST 2015


On Tue, 2015-08-04 at 15:36 +0000, Tom Warren wrote:

> Thanks. My T20/T30 boards are moth-balled, so I don't test on them. 
> T210 USB is fine.
> If you can provide CAR register dumps (0x60006000 - 0x60006FFF) on 
> T20 I can take a look.

I had a look at it. Looks like you missed the cpcon stuff for PLLX both
on T20 as well as T30 but while the former's PLLX won't even lock any
more the later seems to still lock OK. Nonetheless I will send a patch
to fix this for both shortly.

> Appreciate any testing you can do.  This won't go in to u-boot-tegra 
> until you are satisified.

Your patience with us remaining T20/T30 users is highly appreciated as
we still hope to be selling those Colibris for another 10 resp. 13
years!


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