[U-Boot] board_pci_pre_scan() and board_pci_post_scan()

[Bin Meng]

Hi Simon,

On Tue, Aug 4, 2015 at 2:52 AM, Simon Glass <sjg at chromium.org> wrote:
> Hi Bin,
>
> On 2 August 2015 at 20:03, Bin Meng <bmeng.cn at gmail.com> wrote:
>> Hi Simon,
>>
>> On Mon, Aug 3, 2015 at 6:31 AM, Simon Glass <sjg at chromium.org> wrote:
>>> Hi Bin,
>>>
>>> On 27 July 2015 at 01:45, Bin Meng <bmeng.cn at gmail.com> wrote:
>>>> Hi Simon,
>>>>
>>>> With driver model pci conversion on x86 boards, we now missed the call
>>>> to board_pci_pre_scan() and board_pci_post_scan() which are called in
>>>> the non-dm path. For example, board_pci_post_scan() in
>>>> arch/x86/lib/fsp/fsp_common.c is not called to do any work as
>>>> requested by FSP after pci enumeration.
>>>>
>>>> I am not sure where we could insert these call back in the dm. Do you
>>>> have any possible solution on this?
>>>
>>> I know that the post-scan is needed for FSP - and in fact for
>>> Minnowmax I added in back in a recent patch[1]. What is the pre-scan
>>> used for?
>>>
>>> Regards,
>>> Simon
>>>
>>> [1] http://patchwork.ozlabs.org/patch/500864/
>>
>> I see fsp_init_phase_pci() is called in arch_misc_init() which is
>> really late in your patch. According to FSP spec, we should call this
>> as soon as pci bus is enumerated. The original non-dm codes does this
>> correctly. As for pre-scan, so far it does nothing. I believe we can
>> drop it.
>
> What does the FSP actually do with this? Also we may enumerate it
> twice with your recent patches.
>

I have no idea we don't have the source codes. Per my read of FSP
architecture specification, I think the post pci needs to initialize
some chipset registers that are documented in the BIOS Writer's Guide
which are marked as post-enumeration phase tasks. As for enumeration,
yes, it will end up doing twice but that's how previously non-dm pci
works on the Crown Bay board. Note U-Boot does enumeration twice, but
it only calls board_pci_pre_scan() and board_pci_post_scan() after
relocation. That means we only call FSP post pci notify routine just
once, and actually it works good on the Crown Bay board. I doubt we
can call FSP post pci twice.

> pci_uclass_post_probe() is the place where we kick off and complete
> scanning of the bus. I'm open to options on this one, but perhaps if
> we can forcing a bus problem as per your recent patch then we could
> just call the FSP function there?
>

Regards,
Bin