[U-Boot] [PATCH] lpc32xx: move common SLC NAND defines to arch/config.h

[LEMIEUX, SYLVAIN]

Hi Vladimir,

> -----Original Message-----
> From: Vladimir Zapolskiy [mailto:vz at mleia.com]
> Sent: 11-Aug-15 12:57 PM
>
> A number of LPC32xx SLC NAND defines is dictated by controller
> hardware limits and OOB layout is defined by operating system, the
> definitions are common for all users. Since those macro are used
> in out of NAND SLC driver code (simple NAND SPL framework), they can
> not be placed into the driver, therefore move them from board config
> files to arch/config.h
>
> The change also adds OOB layout details specific to small page NAND
> devices taken from Linux kernel.
>
> Signed-off-by: Vladimir Zapolskiy <vz at mleia.com>
> ---
> The change is based on
> * https://patchwork.ozlabs.org/patch/497298/
> * https://patchwork.ozlabs.org/patch/497299/
>
>  arch/arm/include/asm/arch-lpc32xx/config.h | 29 +++++++++++++++++++++++++++++
>  include/configs/devkit3250.h               | 14 +++-----------
>  2 files changed, 32 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h
> index d57bc48..d161ad2 100644
> --- a/arch/arm/include/asm/arch-lpc32xx/config.h
> +++ b/arch/arm/include/asm/arch-lpc32xx/config.h
> @@ -55,6 +55,35 @@
>  /* Ethernet */
>  #define LPC32XX_ETH_BASE ETHERNET_BASE
>
> +/* NAND */
> +#if defined(CONFIG_NAND_LPC32XX_SLC)

[..]

> +#if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE)
> +#define CONFIG_SYS_NAND_OOBSIZE              64
> +#define CONFIG_SYS_NAND_ECCPOS               { 40, 41, 42, 43, 44, 45, 46, 47, \
> +                                       48, 49, 50, 51, 52, 53, 54, 55, \
> +                                       56, 57, 58, 59, 60, 61, 62, 63, }
> +#define CONFIG_SYS_NAND_BAD_BLOCK_POS        NAND_LARGE_BADBLOCK_POS

Should we only move to "config.h", the definition that are use
by the NAND SPL framework and the NAND SLC driver?

The following definition are only use by the NAND SPL framework:
* CONFIG_SYS_NAND_ECCPOS
* CONFIG_SYS_NAND_BAD_BLOCK_POS
* CONFIG_SYS_NAND_PAGE_COUNT

[...]
> +#define CONFIG_SYS_NAND_ECCSIZE              0x100
> +#define CONFIG_SYS_NAND_ECCBYTES     3
> +
Do you want to change "lpc32xx_nand_slc.c" to use those 2 define
as part of this patch or do you prefer I change them as part of the
"nand: LPC32xx: add hardware ECC support" patch?

[...]
> --
> 2.1.4


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