[U-Boot] [PATCH] i2c: lpc32xx: correct sanity check for requested bus speed

[LEMIEUX, SYLVAIN]

> -----Original Message-----
> From: Vladimir Zapolskiy [mailto:vz at mleia.com]
> Sent: 12-Aug-15 1:22 PM
>
> LPC32xx has 3 I2C bus controllers, 2 of them are used as generic ones
> and their parent clock is HCLK and CLK_HI/CLK_LO registers are 10 bit
> wide. This means that if HCLK is 104MHz, then minimal configurable I2C
> clock speed is about 51KHz.
>
> Only USB OTG I2C bus controller CLK registers are 8 bit wide, thus in
> assumption that peripheral clock is 13MHz it allows to set the minimal
> bus speed about 25.5KHz.
>
> Check for negative half clock value is removed since it is always false.
>
> The change fixes the following problem for I2C busses 0 and 1:
>
>   => i2c dev 0
>   Setting bus to 0
>   => i2c speed 100000
>   Setting bus speed to 100000 Hz
>   Failure changing bus speed (-22)
>
> Signed-off-by: Vladimir Zapolskiy <vz at mleia.com>
> ---
> The change is based on
> * https://patchwork.ozlabs.org/patch/503817/
> * https://patchwork.ozlabs.org/patch/500511/
>
>  drivers/i2c/lpc32xx_i2c.c | 22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c
> index be166b0..6c8b504 100644
> --- a/drivers/i2c/lpc32xx_i2c.c
> +++ b/drivers/i2c/lpc32xx_i2c.c
> @@ -69,20 +69,20 @@ static unsigned int lpc32xx_i2c_set_bus_speed(struct i2c_adapter *adap,
>                       unsigned int speed)
>  {

[...]

Tested-by: Sylvain Lemieux <slemieux at tycoint.com>


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