[U-Boot] [RFC PATCH 10/28] powerpc: remove inka4x0 support

Masahiro Yamada yamada.masahiro at socionext.com
Thu Aug 13 12:15:28 CEST 2015


This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com>
---

 arch/powerpc/cpu/mpc5xxx/Kconfig |   4 -
 board/inka4x0/Kconfig            |   9 -
 board/inka4x0/MAINTAINERS        |   6 -
 board/inka4x0/Makefile           |   8 -
 board/inka4x0/inka4x0.c          | 250 ---------------------
 board/inka4x0/inkadiag.c         | 464 ---------------------------------------
 board/inka4x0/k4h511638c.h       |  16 --
 board/inka4x0/mt46v16m16-75.h    |  16 --
 board/inka4x0/mt46v32m16-75.h    |  16 --
 board/inka4x0/mt48lc16m16a2-75.h |  14 --
 configs/inka4x0_defconfig        |   4 -
 include/configs/inka4x0.h        | 413 ----------------------------------
 12 files changed, 1220 deletions(-)
 delete mode 100644 board/inka4x0/Kconfig
 delete mode 100644 board/inka4x0/MAINTAINERS
 delete mode 100644 board/inka4x0/Makefile
 delete mode 100644 board/inka4x0/inka4x0.c
 delete mode 100644 board/inka4x0/inkadiag.c
 delete mode 100644 board/inka4x0/k4h511638c.h
 delete mode 100644 board/inka4x0/mt46v16m16-75.h
 delete mode 100644 board/inka4x0/mt46v32m16-75.h
 delete mode 100644 board/inka4x0/mt48lc16m16a2-75.h
 delete mode 100644 configs/inka4x0_defconfig
 delete mode 100644 include/configs/inka4x0.h

diff --git a/arch/powerpc/cpu/mpc5xxx/Kconfig b/arch/powerpc/cpu/mpc5xxx/Kconfig
index 526e891..23117ac 100644
--- a/arch/powerpc/cpu/mpc5xxx/Kconfig
+++ b/arch/powerpc/cpu/mpc5xxx/Kconfig
@@ -18,9 +18,6 @@ config TARGET_A4M072
 config TARGET_CM5200
 	bool "Support cm5200"
 
-config TARGET_INKA4X0
-	bool "Support inka4x0"
-
 config TARGET_IPEK01
 	bool "Support ipek01"
 
@@ -72,7 +69,6 @@ source "board/a3m071/Kconfig"
 source "board/a4m072/Kconfig"
 source "board/cm5200/Kconfig"
 source "board/ifm/o2dnt2/Kconfig"
-source "board/inka4x0/Kconfig"
 source "board/intercontrol/digsy_mtc/Kconfig"
 source "board/ipek01/Kconfig"
 source "board/jupiter/Kconfig"
diff --git a/board/inka4x0/Kconfig b/board/inka4x0/Kconfig
deleted file mode 100644
index 94a41f0..0000000
--- a/board/inka4x0/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_INKA4X0
-
-config SYS_BOARD
-	default "inka4x0"
-
-config SYS_CONFIG_NAME
-	default "inka4x0"
-
-endif
diff --git a/board/inka4x0/MAINTAINERS b/board/inka4x0/MAINTAINERS
deleted file mode 100644
index 246b2d4..0000000
--- a/board/inka4x0/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-INKA4X0 BOARD
-M:	Detlev Zundel <dzu at denx.de>
-S:	Maintained
-F:	board/inka4x0/
-F:	include/configs/inka4x0.h
-F:	configs/inka4x0_defconfig
diff --git a/board/inka4x0/Makefile b/board/inka4x0/Makefile
deleted file mode 100644
index c9a3540..0000000
--- a/board/inka4x0/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2003-2009
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	:= inka4x0.o inkadiag.o
diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c
deleted file mode 100644
index 0a32f0e..0000000
--- a/board/inka4x0/inka4x0.c
+++ /dev/null
@@ -1,250 +0,0 @@
-/*
- * (C) Copyright 2008-2009
- * Andreas Pfefferle, DENX Software Engineering, ap at denx.de.
- *
- * (C) Copyright 2009
- * Detlev Zundel, DENX Software Engineering, dzu at denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas at motorola.com.
- *
- * (C) Copyright 2004
- * Martin Krause, TQ-Systems GmbH, martin.krause at tqs.de
- *
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <asm/io.h>
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-
-#if defined(CONFIG_DDR_MT46V16M16)
-#include "mt46v16m16-75.h"
-#elif defined(CONFIG_SDR_MT48LC16M16A2)
-#include "mt48lc16m16a2-75.h"
-#elif defined(CONFIG_DDR_MT46V32M16)
-#include "mt46v32m16.h"
-#elif defined(CONFIG_DDR_HYB25D512160BF)
-#include "hyb25d512160bf.h"
-#elif defined(CONFIG_DDR_K4H511638C)
-#include "k4h511638c.h"
-#else
-#error "INKA4x0 SDRAM: invalid chip type specified!"
-#endif
-
-#ifndef CONFIG_SYS_RAMBOOT
-static void sdram_start (int hi_addr)
-{
-	volatile struct mpc5xxx_sdram *sdram =
-		(struct mpc5xxx_sdram *)MPC5XXX_SDRAM;
-	long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
-	/* unlock mode register */
-	out_be32(&sdram->ctrl, SDRAM_CONTROL | 0x80000000 | hi_addr_bit);
-
-	/* precharge all banks */
-	out_be32(&sdram->ctrl, SDRAM_CONTROL | 0x80000002 | hi_addr_bit);
-
-#if SDRAM_DDR
-	/* set mode register: extended mode */
-	out_be32(&sdram->mode, SDRAM_EMODE);
-
-	/* set mode register: reset DLL */
-	out_be32(&sdram->mode, SDRAM_MODE | 0x04000000);
-#endif
-
-	/* precharge all banks */
-	out_be32(&sdram->ctrl, SDRAM_CONTROL | 0x80000002 | hi_addr_bit);
-
-	/* auto refresh */
-	out_be32(&sdram->ctrl, SDRAM_CONTROL | 0x80000004 | hi_addr_bit);
-
-	/* set mode register */
-	out_be32(&sdram->mode, SDRAM_MODE);
-
-	/* normal operation */
-	out_be32(&sdram->ctrl, SDRAM_CONTROL | hi_addr_bit);
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- *	      use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
- *	      is something else than 0x00000000.
- */
-
-phys_size_t initdram (int board_type)
-{
-	volatile struct mpc5xxx_mmap_ctl *mm =
-		(struct mpc5xxx_mmap_ctl *) CONFIG_SYS_MBAR;
-	volatile struct mpc5xxx_cdm     *cdm =
-		(struct mpc5xxx_cdm *)      MPC5XXX_CDM;
-	volatile struct mpc5xxx_sdram *sdram =
-		(struct mpc5xxx_sdram *)    MPC5XXX_SDRAM;
-	ulong dramsize = 0;
-#ifndef CONFIG_SYS_RAMBOOT
-	long test1, test2;
-
-	/* setup SDRAM chip selects */
-	out_be32(&mm->sdram0, 0x0000001c);	/* 512MB at 0x0 */
-	out_be32(&mm->sdram1, 0x40000000);	/* disabled */
-
-	/* setup config registers */
-	out_be32(&sdram->config1, SDRAM_CONFIG1);
-	out_be32(&sdram->config2, SDRAM_CONFIG2);
-
-#if SDRAM_DDR
-	/* set tap delay */
-	out_be32(&cdm->porcfg, SDRAM_TAPDELAY);
-#endif
-
-	/* find RAM size using SDRAM CS0 only */
-	sdram_start(0);
-	test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
-	sdram_start(1);
-	test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
-	if (test1 > test2) {
-		sdram_start(0);
-		dramsize = test1;
-	} else {
-		dramsize = test2;
-	}
-
-	/* memory smaller than 1MB is impossible */
-	if (dramsize < (1 << 20)) {
-		dramsize = 0;
-	}
-
-	/* set SDRAM CS0 size according to the amount of RAM found */
-	if (dramsize > 0) {
-		out_be32(&mm->sdram0, 0x13 +
-			 __builtin_ffs(dramsize >> 20) - 1);
-	} else {
-		out_be32(&mm->sdram0, 0); /* disabled */
-	}
-
-	out_be32(&mm->sdram1, dramsize); /* disabled */
-#else /* CONFIG_SYS_RAMBOOT */
-
-	/* retrieve size of memory connected to SDRAM CS0 */
-	dramsize = in_be32(&mm->sdram0) & 0xFF;
-	if (dramsize >= 0x13) {
-		dramsize = (1 << (dramsize - 0x13)) << 20;
-	} else {
-		dramsize = 0;
-	}
-#endif /* CONFIG_SYS_RAMBOOT */
-
-	return dramsize;
-}
-
-int checkboard (void)
-{
-	puts ("Board: INKA 4X0\n");
-	return 0;
-}
-
-void flash_preinit(void)
-{
-	volatile struct mpc5xxx_lpb *lpb = (struct mpc5xxx_lpb *)MPC5XXX_LPB;
-
-	/*
-	 * Now, when we are in RAM, enable flash write
-	 * access for detection process.
-	 * Note that CS_BOOT (CS0) cannot be cleared when
-	 * executing in flash.
-	 */
-	clrbits_be32(&lpb->cs0_cfg, 0x1); /* clear RO */
-}
-
-int misc_init_f (void)
-{
-	volatile struct mpc5xxx_gpio	*gpio    =
-		(struct mpc5xxx_gpio *)   MPC5XXX_GPIO;
-	volatile struct mpc5xxx_wu_gpio	*wu_gpio =
-		(struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO;
-	volatile struct mpc5xxx_gpt	*gpt;
-	char tmp[10];
-	int i, br;
-
-	i = getenv_f("brightness", tmp, sizeof(tmp));
-	br = (i > 0)
-		? (int) simple_strtoul (tmp, NULL, 10)
-		: CONFIG_SYS_BRIGHTNESS;
-	if (br > 255)
-		br = 255;
-
-	/* Initialize GPIO output pins.
-	 */
-	/* Configure GPT as GPIO output (and set them as they control low-active LEDs */
-	for (i = 0; i <= 5; i++) {
-		gpt = (struct mpc5xxx_gpt *)(MPC5XXX_GPT + (i * 0x10));
-		out_be32(&gpt->emsr, 0x34);
-	}
-
-	/* Configure GPT7 as PWM timer, 1kHz, no ints. */
-	gpt = (struct mpc5xxx_gpt *)(MPC5XXX_GPT + (7 * 0x10));
-	out_be32(&gpt->emsr,  0);		/* Disable */
-	out_be32(&gpt->cir,   0x020000fe);
-	out_be32(&gpt->pwmcr, (br << 16));
-	out_be32(&gpt->emsr,  0x3);		/* Enable PWM mode and start */
-
-	/* Configure PSC3_6,7 as GPIO output */
-	setbits_be32(&gpio->simple_gpioe, MPC5XXX_GPIO_SIMPLE_PSC3_6 |
-					  MPC5XXX_GPIO_SIMPLE_PSC3_7);
-	setbits_be32(&gpio->simple_ddr,   MPC5XXX_GPIO_SIMPLE_PSC3_6 |
-					  MPC5XXX_GPIO_SIMPLE_PSC3_7);
-
-	/* Configure PSC3_9 and GPIO_WKUP6,7 as GPIO output */
-	setbits_8(&wu_gpio->enable,  MPC5XXX_GPIO_WKUP_6 |
-				     MPC5XXX_GPIO_WKUP_7 |
-				     MPC5XXX_GPIO_WKUP_PSC3_9);
-	setbits_8(&wu_gpio->ddr,     MPC5XXX_GPIO_WKUP_6 |
-				     MPC5XXX_GPIO_WKUP_7 |
-				     MPC5XXX_GPIO_WKUP_PSC3_9);
-
-	/* Set LR mirror bit because it is low-active */
-	setbits_8(&wu_gpio->dvo,     MPC5XXX_GPIO_WKUP_7);
-
-	/* Reset Coral-P graphics controller */
-	setbits_8(&wu_gpio->dvo,     MPC5XXX_GPIO_WKUP_PSC3_9);
-
-	/* Enable display backlight */
-	clrbits_8(&gpio->sint_inten, MPC5XXX_GPIO_SINT_PSC3_8);
-	setbits_8(&gpio->sint_gpioe, MPC5XXX_GPIO_SINT_PSC3_8);
-	setbits_8(&gpio->sint_ddr,   MPC5XXX_GPIO_SINT_PSC3_8);
-	setbits_8(&gpio->sint_dvo,   MPC5XXX_GPIO_SINT_PSC3_8);
-
-	/*
-	 * Configure three wire serial interface to RTC (PSC1_4,
-	 * PSC2_4, PSC3_4, PSC3_5)
-	 */
-	setbits_8(&wu_gpio->enable,  MPC5XXX_GPIO_WKUP_PSC1_4 |
-				     MPC5XXX_GPIO_WKUP_PSC2_4);
-	setbits_8(&wu_gpio->ddr,     MPC5XXX_GPIO_WKUP_PSC1_4 |
-				     MPC5XXX_GPIO_WKUP_PSC2_4);
-	clrbits_8(&wu_gpio->dvo,     MPC5XXX_GPIO_WKUP_PSC1_4);
-	clrbits_8(&gpio->sint_inten, MPC5XXX_GPIO_SINT_PSC3_4 |
-				     MPC5XXX_GPIO_SINT_PSC3_5);
-	setbits_8(&gpio->sint_gpioe, MPC5XXX_GPIO_SINT_PSC3_4 |
-				     MPC5XXX_GPIO_SINT_PSC3_5);
-	setbits_8(&gpio->sint_ddr,   MPC5XXX_GPIO_SINT_PSC3_5);
-	clrbits_8(&gpio->sint_dvo,   MPC5XXX_GPIO_SINT_PSC3_5);
-
-	return 0;
-}
-
-#ifdef	CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
-	pci_mpc5xxx_init(&hose);
-}
-#endif
diff --git a/board/inka4x0/inkadiag.c b/board/inka4x0/inkadiag.c
deleted file mode 100644
index 0bd12ec..0000000
--- a/board/inka4x0/inkadiag.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/*
- * (C) Copyright 2008, 2009 Andreas Pfefferle,
- *     DENX Software Engineering, ap at denx.de.
- * (C) Copyright 2009 Detlev Zundel,
- *     DENX Software Engineering, dzu at denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <asm/io.h>
-#include <common.h>
-#include <config.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-
-#include <command.h>
-
-/* This is needed for the includes in ns16550.h */
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-#include <ns16550.h>
-
-#define GPIO_BASE		((u_char *)CONFIG_SYS_CS3_START)
-
-#define DIGIN_TOUCHSCR_MASK	0x00003000	/* Inputs 12-13 */
-#define DIGIN_KEYB_MASK		0x00010000	/* Input 16 */
-
-#define DIGIN_DRAWER_SW1	0x00400000	/* Input 22 */
-#define DIGIN_DRAWER_SW2	0x00800000	/* Input 23 */
-
-#define DIGIO_LED0		0x00000001	/* Output 0 */
-#define DIGIO_LED1		0x00000002	/* Output 1 */
-#define DIGIO_LED2		0x00000004	/* Output 2 */
-#define DIGIO_LED3		0x00000008	/* Output 3 */
-#define DIGIO_LED4		0x00000010	/* Output 4 */
-#define DIGIO_LED5		0x00000020	/* Output 5 */
-
-#define DIGIO_DRAWER1		0x00000100	/* Output 8 */
-#define DIGIO_DRAWER2		0x00000200	/* Output 9 */
-
-#define SERIAL_PORT_BASE	((u_char *)CONFIG_SYS_CS2_START)
-
-#define PSC_OP1_RTS	0x01
-#define PSC_OP0_RTS	0x01
-
-/*
- * Table with supported baudrates (defined in inka4x0.h)
- */
-static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
-#define	N_BAUDRATES (sizeof(baudrate_table) / sizeof(baudrate_table[0]))
-
-static unsigned int inka_digin_get_input(void)
-{
-	return in_8(GPIO_BASE + 0) << 0 | in_8(GPIO_BASE + 1) << 8 |
-		in_8(GPIO_BASE + 2) << 16 | in_8(GPIO_BASE + 3) << 24;
-}
-
-#define LED_HIGH(NUM)							\
-	do {								\
-		setbits_be32((unsigned *)MPC5XXX_GPT##NUM##_ENABLE, 0x10); \
-	} while (0)
-
-#define LED_LOW(NUM)							\
-	do {								\
-		clrbits_be32((unsigned *)MPC5XXX_GPT##NUM##_ENABLE, 0x10); \
-	} while (0)
-
-#define CHECK_LED(NUM) \
-    do { \
-	    if (state & (1 << NUM)) {		\
-		    LED_HIGH(NUM);		\
-	    } else {				\
-		    LED_LOW(NUM);		\
-	    }					\
-    } while (0)
-
-static void inka_digio_set_output(unsigned int state, int which)
-{
-	volatile struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
-
-	if (which == 0) {
-		/* other */
-		CHECK_LED(0);
-		CHECK_LED(1);
-		CHECK_LED(2);
-		CHECK_LED(3);
-		CHECK_LED(4);
-		CHECK_LED(5);
-	} else {
-		if (which == 1) {
-			/* drawer1 */
-			if (state) {
-				clrbits_be32(&gpio->simple_dvo, 0x1000);
-				udelay(1);
-				setbits_be32(&gpio->simple_dvo, 0x1000);
-			} else {
-				setbits_be32(&gpio->simple_dvo, 0x1000);
-				udelay(1);
-				clrbits_be32(&gpio->simple_dvo, 0x1000);
-			}
-		}
-		if (which == 2) {
-			/* drawer 2 */
-			if (state) {
-				clrbits_be32(&gpio->simple_dvo, 0x2000);
-				udelay(1);
-				setbits_be32(&gpio->simple_dvo, 0x2000);
-			} else {
-				setbits_be32(&gpio->simple_dvo, 0x2000);
-				udelay(1);
-				clrbits_be32(&gpio->simple_dvo, 0x2000);
-			}
-		}
-	}
-	udelay(1);
-}
-
-static int do_inkadiag_io(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[]) {
-	unsigned int state, val;
-
-	switch (argc) {
-	case 3:
-		/* Write a value */
-		val = simple_strtol(argv[2], NULL, 16);
-
-		if (strcmp(argv[1], "drawer1") == 0) {
-			inka_digio_set_output(val, 1);
-		} else if (strcmp(argv[1], "drawer2") == 0) {
-			inka_digio_set_output(val, 2);
-		} else if (strcmp(argv[1], "other") == 0)
-			inka_digio_set_output(val, 0);
-		else {
-			printf("Invalid argument: %s\n", argv[1]);
-			return -1;
-		}
-		/* fall through */
-	case 2:
-		/* Read a value */
-		state = inka_digin_get_input();
-
-		if (strcmp(argv[1], "drawer1") == 0) {
-			val = (state & DIGIN_DRAWER_SW1) >> (ffs(DIGIN_DRAWER_SW1) - 1);
-		} else if (strcmp(argv[1], "drawer2") == 0) {
-			val = (state & DIGIN_DRAWER_SW2) >> (ffs(DIGIN_DRAWER_SW2) - 1);
-		} else if (strcmp(argv[1], "other") == 0) {
-			val = ((state & DIGIN_KEYB_MASK) >> (ffs(DIGIN_KEYB_MASK) - 1))
-				| (state & DIGIN_TOUCHSCR_MASK) >> (ffs(DIGIN_TOUCHSCR_MASK) - 2);
-		} else {
-			printf("Invalid argument: %s\n", argv[1]);
-			return -1;
-		}
-		printf("exit code: 0x%X\n", val);
-		return 0;
-	default:
-		return cmd_usage(cmdtp);
-	}
-
-	return -1;
-}
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static int ser_init(volatile struct mpc5xxx_psc *psc, int baudrate)
-{
-	unsigned long baseclk;
-	int div;
-
-	/* reset PSC */
-	out_8(&psc->command, PSC_SEL_MODE_REG_1);
-
-	/* select clock sources */
-
-	out_be16(&psc->psc_clock_select, 0);
-	baseclk = (gd->arch.ipb_clk + 16) / 32;
-
-	/* switch to UART mode */
-	out_be32(&psc->sicr, 0);
-
-	/* configure parity, bit length and so on */
-
-	out_8(&psc->mode, PSC_MODE_8_BITS | PSC_MODE_PARNONE);
-	out_8(&psc->mode, PSC_MODE_ONE_STOP);
-
-	/* set up UART divisor */
-	div = (baseclk + (baudrate / 2)) / baudrate;
-	out_8(&psc->ctur, (div >> 8) & 0xff);
-	out_8(&psc->ctlr, div & 0xff);
-
-	/* disable all interrupts */
-	out_be16(&psc->psc_imr, 0);
-
-	/* reset and enable Rx/Tx */
-	out_8(&psc->command, PSC_RST_RX);
-	out_8(&psc->command, PSC_RST_TX);
-	out_8(&psc->command, PSC_RX_ENABLE | PSC_TX_ENABLE);
-
-	return 0;
-}
-
-static void ser_putc(volatile struct mpc5xxx_psc *psc, const char c)
-{
-	/* Wait 1 second for last character to go. */
-	int i = 0;
-
-	while (!(psc->psc_status & PSC_SR_TXEMP) && (i++ < 1000000/10))
-		udelay(10);
-	psc->psc_buffer_8 = c;
-
-}
-
-static int ser_getc(volatile struct mpc5xxx_psc *psc)
-{
-	/* Wait for a character to arrive. */
-	int i = 0;
-
-	while (!(in_be16(&psc->psc_status) & PSC_SR_RXRDY) && (i++ < 1000000/10))
-		udelay(10);
-
-	return in_8(&psc->psc_buffer_8);
-}
-
-static int do_inkadiag_serial(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[]) {
-	volatile struct NS16550 *uart;
-	volatile struct mpc5xxx_psc *psc;
-	unsigned int num, mode;
-	int combrd, baudrate, i, j, len;
-	int address;
-
-	if (argc < 5)
-		return cmd_usage(cmdtp);
-
-	argc--;
-	argv++;
-
-	num = simple_strtol(argv[0], NULL, 0);
-	if (num < 0 || num > 11) {
-		printf("invalid argument for num: %d\n", num);
-		return -1;
-	}
-
-	mode = simple_strtol(argv[1], NULL, 0);
-
-	combrd = 0;
-	baudrate = simple_strtoul(argv[2], NULL, 10);
-	for (i=0; i<N_BAUDRATES; ++i) {
-		if (baudrate == baudrate_table[i])
-			break;
-	}
-	if (i == N_BAUDRATES) {
-		printf("## Baudrate %d bps not supported\n",
-		       baudrate);
-		return 1;
-	}
-	combrd = 115200 / baudrate;
-
-	uart = (struct NS16550 *)(SERIAL_PORT_BASE + (num << 3));
-
-	printf("Testing uart %d.\n\n", num);
-
-	if ((num >= 0) && (num <= 7)) {
-		if (mode & 1) {
-			/* turn on 'loopback' mode */
-			out_8(&uart->mcr, UART_MCR_LOOP);
-		} else {
-			/*
-			 * establish the UART's operational parameters
-			 * set DLAB=1, so rbr accesses DLL
-			 */
-			out_8(&uart->lcr, UART_LCR_DLAB);
-			/* set baudrate */
-			out_8(&uart->rbr, combrd);
-			/* set data-format: 8-N-1 */
-			out_8(&uart->lcr, UART_LCR_WLS_8);
-		}
-
-		if (mode & 2) {
-			/* set request to send */
-			out_8(&uart->mcr, UART_MCR_RTS);
-			udelay(10);
-			/* check clear to send */
-			if ((in_8(&uart->msr) & UART_MSR_CTS) == 0x00)
-				return -1;
-		}
-		if (mode & 4) {
-			/* set data terminal ready */
-			out_8(&uart->mcr, UART_MCR_DTR);
-			udelay(10);
-			/* check data set ready and carrier detect */
-			if ((in_8(&uart->msr) & (UART_MSR_DSR | UART_MSR_DCD))
-			    != (UART_MSR_DSR | UART_MSR_DCD))
-				return -1;
-		}
-
-		/* write each message-character, read it back, and display it */
-		for (i = 0, len = strlen(argv[3]); i < len; ++i) {
-			j = 0;
-			while ((in_8(&uart->lsr) & UART_LSR_THRE) ==	0x00) {
-				if (j++ > CONFIG_SYS_HZ)
-					break;
-				udelay(10);
-			}
-			out_8(&uart->rbr, argv[3][i]);
-			j = 0;
-			while ((in_8(&uart->lsr) & UART_LSR_DR) == 0x00) {
-				if (j++ > CONFIG_SYS_HZ)
-					break;
-				udelay(10);
-			}
-			printf("%c", in_8(&uart->rbr));
-		}
-		printf("\n\n");
-		out_8(&uart->mcr, 0x00);
-	} else {
-		address = 0;
-
-		switch (num) {
-		case 8:
-			address = MPC5XXX_PSC6;
-			break;
-		case 9:
-			address = MPC5XXX_PSC3;
-			break;
-		case 10:
-			address = MPC5XXX_PSC2;
-			break;
-		case 11:
-			address = MPC5XXX_PSC1;
-			break;
-		}
-		psc = (struct mpc5xxx_psc *)address;
-		ser_init(psc, simple_strtol(argv[2], NULL, 0));
-		if (mode & 2) {
-			/* set request to send */
-			out_8(&psc->op0, PSC_OP0_RTS);
-			udelay(10);
-			/* check clear to send */
-			if ((in_8(&psc->ip) & PSC_IPCR_CTS) == 0)
-				return -1;
-		}
-		len = strlen(argv[3]);
-		for (i = 0; i < len; ++i) {
-			ser_putc(psc, argv[3][i]);
-			printf("%c", ser_getc(psc));
-		}
-		printf("\n\n");
-	}
-	return 0;
-}
-
-#define BUZZER_GPT	(MPC5XXX_GPT + 0x60)	/* GPT6 */
-static void buzzer_turn_on(unsigned int freq)
-{
-	volatile struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)(BUZZER_GPT);
-
-	const u32 prescale = gd->arch.ipb_clk / freq / 128;
-	const u32 count = 128;
-	const u32 width = 64;
-
-	gpt->cir = (prescale << 16) | count;
-	gpt->pwmcr = width << 16;
-	gpt->emsr = 3;		/* Timer enabled for PWM */
-}
-
-static void buzzer_turn_off(void)
-{
-	volatile struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)(BUZZER_GPT);
-
-	gpt->emsr = 0;
-}
-
-static int do_inkadiag_buzzer(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[]) {
-
-	unsigned int period, freq;
-	int prev, i;
-
-	if (argc != 3)
-		return cmd_usage(cmdtp);
-
-	argc--;
-	argv++;
-
-	period = simple_strtol(argv[0], NULL, 0);
-	if (!period)
-		printf("Zero period is senseless\n");
-	argc--;
-	argv++;
-
-	freq = simple_strtol(argv[0], NULL, 0);
-	/* avoid zero prescale in buzzer_turn_on() */
-	if (freq > gd->arch.ipb_clk / 128) {
-		printf("%dHz exceeds maximum (%ldHz)\n", freq,
-		       gd->arch.ipb_clk / 128);
-	} else if (!freq)
-		printf("Zero frequency is senseless\n");
-	else
-		buzzer_turn_on(freq);
-
-	clear_ctrlc();
-	prev = disable_ctrlc(0);
-
-	printf("Buzzing for %d ms. Type ^C to abort!\n\n", period);
-
-	i = 0;
-	while (!ctrlc() && (i++ < CONFIG_SYS_HZ))
-		udelay(period);
-
-	clear_ctrlc();
-	disable_ctrlc(prev);
-
-	buzzer_turn_off();
-
-	return 0;
-}
-
-static int do_inkadiag_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-
-cmd_tbl_t cmd_inkadiag_sub[] = {
-	U_BOOT_CMD_MKENT(io, 1, 1, do_inkadiag_io, "read digital input",
-	 "<drawer1|drawer2|other> [value] - get or set specified signal"),
-	U_BOOT_CMD_MKENT(serial, 4, 1, do_inkadiag_serial, "test serial port",
-	 "<num> <mode> <baudrate> <msg>  - test uart num [0..11] in mode\n"
-	 "and baudrate with msg"),
-	U_BOOT_CMD_MKENT(buzzer, 2, 1, do_inkadiag_buzzer, "activate buzzer",
-	 "<period> <freq> - turn buzzer on for period ms with freq hz"),
-	U_BOOT_CMD_MKENT(help, 4, 1, do_inkadiag_help, "get help",
-	 "[command] - get help for command"),
-};
-
-static int do_inkadiag_help(cmd_tbl_t *cmdtp, int flag,
-			    int argc, char * const argv[]) {
-	extern int _do_help (cmd_tbl_t *cmd_start, int cmd_items,
-			     cmd_tbl_t *cmdtp, int flag,
-			     int argc, char * const argv[]);
-	/* do_help prints command name - we prepend inkadiag to our subcommands! */
-#ifdef CONFIG_SYS_LONGHELP
-	puts ("inkadiag ");
-#endif
-	return _do_help(&cmd_inkadiag_sub[0],
-		ARRAY_SIZE(cmd_inkadiag_sub), cmdtp, flag, argc, argv);
-}
-
-static int do_inkadiag(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[]) {
-	cmd_tbl_t *c;
-
-	c = find_cmd_tbl(argv[1], &cmd_inkadiag_sub[0], ARRAY_SIZE(cmd_inkadiag_sub));
-
-	if (c) {
-		argc--;
-		argv++;
-		return c->cmd(c, flag, argc, argv);
-	} else {
-		/* Unrecognized command */
-		return cmd_usage(cmdtp);
-	}
-}
-
-U_BOOT_CMD(inkadiag, 6, 1, do_inkadiag,
-	   "inkadiag - inka diagnosis\n",
-	   "[inkadiag what ...]\n"
-	   "    - perform a diagnosis on inka hardware\n"
-	   "'inkadiag' performs hardware tests.");
diff --git a/board/inka4x0/k4h511638c.h b/board/inka4x0/k4h511638c.h
deleted file mode 100644
index 054ddaf..0000000
--- a/board/inka4x0/k4h511638c.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * Copyright (C) 2007 Semihalf
- * Written by Marian Balakowicz <m8 at semihalf.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#define SDRAM_DDR	1		/* is DDR */
-
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE	0x018D0000
-#define SDRAM_EMODE	0x40090000
-#define SDRAM_CONTROL	0x714F0F00
-#define SDRAM_CONFIG1	0x73722930
-#define SDRAM_CONFIG2	0x46770000
-#define SDRAM_TAPDELAY	0x10000000
diff --git a/board/inka4x0/mt46v16m16-75.h b/board/inka4x0/mt46v16m16-75.h
deleted file mode 100644
index 23fc6f0..0000000
--- a/board/inka4x0/mt46v16m16-75.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas at motorola.com.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#define SDRAM_DDR	1		/* is DDR */
-
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE	0x018D0000
-#define SDRAM_EMODE	0x40090000
-#define SDRAM_CONTROL	0x714F0F00
-#define SDRAM_CONFIG1	0x73722930
-#define SDRAM_CONFIG2	0x47770000
-#define SDRAM_TAPDELAY	0x10000000
diff --git a/board/inka4x0/mt46v32m16-75.h b/board/inka4x0/mt46v32m16-75.h
deleted file mode 100644
index f16f450..0000000
--- a/board/inka4x0/mt46v32m16-75.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * Copyright (C) 2007 Semihalf
- * Written by Marian Balakowicz <m8 at semihalf.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#define SDRAM_DDR	1		/* is DDR */
-
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE	0x018D0000
-#define SDRAM_EMODE	0x40090000
-#define SDRAM_CONTROL	0x714F0F00
-#define SDRAM_CONFIG1	0x73711930
-#define SDRAM_CONFIG2	0x46770000
-#define SDRAM_TAPDELAY	0x10000000
diff --git a/board/inka4x0/mt48lc16m16a2-75.h b/board/inka4x0/mt48lc16m16a2-75.h
deleted file mode 100644
index 0133eaa..0000000
--- a/board/inka4x0/mt48lc16m16a2-75.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas at motorola.com.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#define SDRAM_DDR	0		/* is SDR */
-
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE	0x00CD0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xD2322800
-#define SDRAM_CONFIG2	0x8AD70000
diff --git a/configs/inka4x0_defconfig b/configs/inka4x0_defconfig
deleted file mode 100644
index 4c1016a..0000000
--- a/configs/inka4x0_defconfig
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_PPC=y
-CONFIG_MPC5xxx=y
-CONFIG_TARGET_INKA4X0=y
-# CONFIG_CMD_SETEXPR is not set
diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h
deleted file mode 100644
index c7bf531..0000000
--- a/include/configs/inka4x0.h
+++ /dev/null
@@ -1,413 +0,0 @@
-/*
- * (C) Copyright 2009
- * Detlev Zundel, DENX Software Engineering, dzu at denx.de.
- *
- * (C) Copyright 2003-2005
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC5200		1	/* This is an MPC5200 CPU	*/
-#define CONFIG_INKA4X0		1	/* INKA4x0 board		*/
-
-/*
- * Valid values for CONFIG_SYS_TEXT_BASE are:
- * 0xFFE00000	boot low
- * 0x00100000	boot from RAM (for testing only)
- */
-#ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xFFE00000	/* Standard: boot low */
-#endif
-#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds"
-
-#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz		*/
-
-#define CONFIG_MISC_INIT_F	1	/* Use misc_init_f()			*/
-
-#define CONFIG_HIGH_BATS	1	/* High BATs supported			*/
-
-/*
- * Serial console configuration
- */
-#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1	*/
-#define CONFIG_BAUDRATE		115200	/* ... at 115200 bps	*/
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/*
- * PCI Mapping:
- * 0x40000000 - 0x4fffffff - PCI Memory
- * 0x50000000 - 0x50ffffff - PCI IO Space
- */
-#define CONFIG_PCI		1
-#define CONFIG_PCI_PNP		1
-#define CONFIG_PCI_SCAN_SHOW	1
-#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	1
-
-#define CONFIG_PCI_MEM_BUS	0x40000000
-#define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
-#define CONFIG_PCI_MEM_SIZE	0x10000000
-
-#define CONFIG_PCI_IO_BUS	0x50000000
-#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
-#define CONFIG_PCI_IO_SIZE	0x01000000
-
-#define CONFIG_SYS_XLB_PIPELINING	1
-
-/* Partitions */
-#define CONFIG_MAC_PARTITION
-#define CONFIG_DOS_PARTITION
-#define CONFIG_ISO_PARTITION
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_SNTP
-#define CONFIG_CMD_USB
-
-#define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
-
-#if (CONFIG_SYS_TEXT_BASE == 0xFFE00000)		/* Boot low */
-#   define CONFIG_SYS_LOWBOOT		1
-#endif
-
-/*
- * Autobooting
- */
-#define CONFIG_BOOTDELAY	1	/* autoboot after 1 second */
-
-#define CONFIG_PREBOOT	"echo;" \
-	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#define	CONFIG_IPADDR		192.168.100.2
-#define	CONFIG_SERVERIP		192.168.100.1
-#define	CONFIG_NETMASK		255.255.255.0
-#define HOSTNAME		inka4x0
-#define CONFIG_BOOTFILE		"/tftpboot/inka4x0/uImage"
-#define	CONFIG_ROOTPATH		"/opt/eldk/ppc_6xx"
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"addcons=setenv bootargs ${bootargs} "				\
-		"console=ttyS0,${baudrate}\0"				\
-	"flash_nfs=run nfsargs addip addcons;"				\
-		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp 200000 ${bootfile};"				\
-		"run nfsargs addip addcons;bootm\0"			\
-	"enable_disp=mw.l 100000 04000000 1;"				\
-		"cp.l 100000 f0000b20 1;"				\
-		"cp.l 100000 f0000b28 1\0"				\
-	"ideargs=setenv bootargs root=/dev/hda1 rw\0"			\
-	"ide_boot=ext2load ide 0:1 200000 uImage;"			\
-		"run ideargs addip addcons enable_disp;bootm\0"		\
-	"brightness=255\0"						\
-	""
-
-#define CONFIG_BOOTCOMMAND	"run ide_boot"
-
-/*
- * IPB Bus clocking configuration.
- */
-#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-
-/*
- * Flash configuration
- */
-#define CONFIG_SYS_FLASH_CFI		1	/* Flash is CFI conformant */
-#define CONFIG_FLASH_CFI_DRIVER	1
-#define CONFIG_SYS_FLASH_BASE		0xffe00000
-#define CONFIG_SYS_FLASH_SIZE		0x00200000
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks */
-#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
-#define CONFIG_SYS_MAX_FLASH_SECT	128	/* max num of sects on one chip */
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1	/* use buffered writes (20x faster) */
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x4000)
-#define CONFIG_ENV_SIZE		0x2000
-#define CONFIG_ENV_SECT_SIZE	0x2000
-#define CONFIG_ENV_OVERWRITE	1
-#define CONFIG_SYS_USE_PPCENV			/* Environment embedded in sect .ppcenv */
-
-/*
- * Memory map
- */
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
-
-/*
- * SDRAM controller configuration
- */
-#undef CONFIG_SDR_MT48LC16M16A2
-#undef CONFIG_DDR_MT46V16M16
-#undef CONFIG_DDR_MT46V32M16
-#undef CONFIG_DDR_HYB25D512160BF
-#define CONFIG_DDR_K4H511638C
-
-/* Use ON-Chip SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-
-/* preserve space for the post_word at end of on-chip SRAM */
-#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
-
-#ifdef CONFIG_POST
-#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_POST_SIZE
-#else
-#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE
-#endif
-
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define CONFIG_SYS_RAMBOOT		1
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC5xxx_FEC	1
-#define CONFIG_MPC5xxx_FEC_MII100
-/*
- * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
- */
-/* #define CONFIG_MPC5xxx_FEC_MII10 */
-#define CONFIG_PHY_ADDR		0x00
-#define CONFIG_MII
-
-/*
- * GPIO configuration
- *
- * use CS1 as gpio_wkup_6 output
- *	Bit 0 (mask: 0x80000000): 0
- * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
- *	00 -> No Alternatives, I2C1 is used for onboard EEPROM
- *	01 -> CAN1 on I2C1, CAN2 on Tmr0/1 do not use on TQM5200 with onboard
- *	      EEPROM
- * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
- * use PSC2 as UART: Bits 24-27 (mask: 0x00000070): 0100
- * use PSC3 as UART: Bits 20-23 (mask: 0x00000700): 0100
- * use PSC6 as UART: Bits  9-11 (mask: 0x00700000): 0101
- */
-#define CONFIG_SYS_GPS_PORT_CONFIG	0x01501444
-
-/*
- * RTC configuration
- */
-#define CONFIG_RTC_RTC4543 	1	/* use external RTC */
-
-/*
- * Software (bit-bang) three wire serial configuration
- *
- * Note that we need the ifdefs because otherwise compilation of
- * mkimage.c fails.
- */
-#define CONFIG_SOFT_TWS		1
-
-#ifdef TWS_IMPLEMENTATION
-#include <mpc5xxx.h>
-#include <asm/io.h>
-
-#define TWS_CE		MPC5XXX_GPIO_WKUP_PSC1_4 /* GPIO_WKUP_0 */
-#define TWS_WR		MPC5XXX_GPIO_WKUP_PSC2_4 /* GPIO_WKUP_1 */
-#define TWS_DATA	MPC5XXX_GPIO_SINT_PSC3_4 /* GPIO_SINT_0 */
-#define TWS_CLK		MPC5XXX_GPIO_SINT_PSC3_5 /* GPIO_SINT_1 */
-
-static inline void tws_ce(unsigned bit)
-{
-	struct mpc5xxx_wu_gpio *wu_gpio =
-		(struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO;
-	if (bit)
-		setbits_8(&wu_gpio->dvo, TWS_CE);
-	else
-		clrbits_8(&wu_gpio->dvo, TWS_CE);
-}
-
-static inline void tws_wr(unsigned bit)
-{
-	struct mpc5xxx_wu_gpio *wu_gpio =
-		(struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO;
-	if (bit)
-		setbits_8(&wu_gpio->dvo, TWS_WR);
-	else
-		clrbits_8(&wu_gpio->dvo, TWS_WR);
-}
-
-static inline void tws_clk(unsigned bit)
-{
-	struct mpc5xxx_gpio *gpio =
-		(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
-	if (bit)
-		setbits_8(&gpio->sint_dvo, TWS_CLK);
-	else
-		clrbits_8(&gpio->sint_dvo, TWS_CLK);
-}
-
-static inline void tws_data(unsigned bit)
-{
-	struct mpc5xxx_gpio *gpio =
-		(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
-	if (bit)
-		setbits_8(&gpio->sint_dvo, TWS_DATA);
-	else
-		clrbits_8(&gpio->sint_dvo, TWS_DATA);
-}
-
-static inline unsigned tws_data_read(void)
-{
-	struct mpc5xxx_gpio *gpio =
-			(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
-	return !!(in_8(&gpio->sint_ival) & TWS_DATA);
-}
-
-static inline void tws_data_config_output(unsigned output)
-{
-	struct mpc5xxx_gpio *gpio =
-		(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
-	if (output)
-		setbits_8(&gpio->sint_ddr, TWS_DATA);
-	else
-		clrbits_8(&gpio->sint_ddr, TWS_DATA);
-}
-#endif /* TWS_IMPLEMENTATION */
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
-#else
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs			*/
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
-/* Enable an alternate, more extensive memory test */
-#define CONFIG_SYS_ALT_MEMTEST
-
-#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
-
-#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */
-
-/*
- * Enable loopw command.
- */
-#define CONFIG_LOOPW
-
-/*
- * Various low-level settings
- */
-#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL		HID0_ICE
-
-#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
-#define CONFIG_SYS_BOOTCS_CFG		0x00087800 /* for pci_clk  = 66 MHz */
-#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
-
-/* 32Mbit SRAM @0x30000000 */
-#define CONFIG_SYS_CS1_START		0x30000000
-#define CONFIG_SYS_CS1_SIZE		0x00400000
-#define CONFIG_SYS_CS1_CFG		0x31800 /* for pci_clk = 33 MHz */
-
-/* 2 quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */
-#define CONFIG_SYS_CS2_START		0x80000000
-#define CONFIG_SYS_CS2_SIZE		0x0001000
-#define CONFIG_SYS_CS2_CFG		0x21800  /* for pci_clk = 33 MHz */
-
-/* GPIO in @0x30400000 */
-#define CONFIG_SYS_CS3_START		0x30400000
-#define CONFIG_SYS_CS3_SIZE		0x00100000
-#define CONFIG_SYS_CS3_CFG		0x31800 /* for pci_clk = 33 MHz */
-
-#define CONFIG_SYS_CS_BURST		0x00000000
-#define CONFIG_SYS_CS_DEADCYCLE	0x33333333
-
-/*-----------------------------------------------------------------------
- * USB stuff
- *-----------------------------------------------------------------------
- */
-#define CONFIG_USB_OHCI
-#define CONFIG_USB_CLOCK	0x00015555
-#define CONFIG_USB_CONFIG	0x00001000
-#define CONFIG_USB_STORAGE
-
-/*-----------------------------------------------------------------------
- * IDE/ATA stuff Supports IDE harddisk
- *-----------------------------------------------------------------------
- */
-
-#undef  CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
-#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
-
-#define CONFIG_IDE_PREINIT
-
-#define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
-#define CONFIG_SYS_IDE_MAXDEVICE	2	/* max. 1 drive per IDE bus	*/
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-#define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
-#define CONFIG_SYS_ATA_DATA_OFFSET	0x0060	/* Offset for data I/O		*/
-#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) /* Offset for normal register accesses */
-#define CONFIG_SYS_ATA_ALT_OFFSET	0x005C	/* Offset for alternate registers */
-#define CONFIG_SYS_ATA_STRIDE          4	/* Interval between registers	*/
-
-#define CONFIG_ATAPI            1
-
-#define CONFIG_SYS_BRIGHTNESS          0xFF	/* LCD Default Brightness (255 = off) */
-
-#endif /* __CONFIG_H */
-- 
1.9.1




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