[U-Boot] [RESUBMIT PATCH v3 2/8] armv8: New MMU setup code allowing to use 48+ bits PA/VA

[Marek Vasut]

On Thursday, August 13, 2015 at 06:51:22 PM, Sergey Temerkhanov wrote:
> This patch adds code which sets up 2-level page tables on ARM64 thus
> extending available VA space. CPUs implementing 64k translation
> granule are able to use direct PA-VA mapping of the whole 48 bit
> address space.
> It also adds the ability to reset the SCTRL register at the very beginning
> of execution to avoid interference from stale mappings set up by early
> firmware/loaders/etc.
> 
> Signed-off-by: Sergey Temerkhanov <s.temerkhanov at gmail.com>
> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla at cavium.com>

Hi!

[...]

> +static void setup_pgtables(void)
> +{
> +	int l1_e, l2_e;
> +	unsigned long pmd = 0;
> +	unsigned long address;
> +
> +	/* Setup the PMD pointers */
> +	for (l1_e = 0; l1_e < CONFIG_SYS_MEM_MAP_SIZE; l1_e++) {
> +		gd->arch.pmd_addr[l1_e] = gd->arch.tlb_addr +
> +						PTL1_ENTRIES * sizeof(u64);
> +		gd->arch.pmd_addr[l1_e] += PTL2_ENTRIES * sizeof(u64) * l1_e;
> +		gd->arch.pmd_addr[l1_e] += 0xffffUL;
> +		gd->arch.pmd_addr[l1_e] &= ~0xffffUL;

Is this an attempt for roundup() ? See include/linux/kernel.h for that macro.
Maybe you can even use round_up(), bit that has some limitations, so be careful.

> +	}
> +
> +	/* Setup the page tables */
> +	for (l1_e = 0; l1_e < PTL1_ENTRIES; l1_e++) {
> +		if (mem_map[pmd].base ==
> +			(uintptr_t)l1_e << PTL2_BITS) {
> +			set_ptl1_entry(l1_e, gd->arch.pmd_addr[pmd]);
> +
> +			for (l2_e = 0; l2_e < PTL2_ENTRIES; l2_e++) {
> +				address = mem_map[pmd].base
> +					+ (uintptr_t)l2_e * BLOCK_SIZE;
> +				set_ptl2_block(gd->arch.pmd_addr[pmd], l2_e,
> +					       address, mem_map[pmd].attrs);
> +			}
> +
> +			pmd++;
> +		} else {
> +			set_ptl1_entry(l1_e, 0);
> +		}
> +	}
> +}
> +
> +#else
> +
>  void set_pgtable_section(u64 *page_table, u64 index, u64 section,
>  			 u64 memory_type)
>  {
[...]