[U-Boot] [PATCH 1/2] arm/ls1021a: Add sata support on qds and twr board
Yuantian Tang
Yuantian.Tang at freescale.com
Fri Aug 14 10:12:43 CEST 2015
> -----Original Message-----
> From: Wang Huan-B18965
> Sent: Friday, August 14, 2015 3:59 PM
> To: Tang Yuantian-B29983; Sun York-R58495
> Cc: u-boot at lists.denx.de; Kushwaha Prabhakar-B32579; Tang Yuantian-
> B29983
> Subject: RE: [PATCH 1/2] arm/ls1021a: Add sata support on qds and twr board
>
> Hi, Yuantian,
>
> > From: Tang Yuantian <Yuantian.Tang at freescale.com>
> >
> > Freescale ARM-based Layerscape LS102xA contain a SATA controller which
> > comply with the serial ATA 3.0 specification and the AHCI 1.3
> > specification.
> > This patch adds SATA feature on ls1021aqds and ls1021atwr boards.
> >
> > Signed-off-by: Tang Yuantian <Yuantian.Tang at freescale.com>
> > ---
> > arch/arm/include/asm/arch-ls102xa/config.h | 15 ++++++
> > arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 24 +++++++++
> > board/freescale/ls1021aqds/ls1021aqds.c | 60
> > +++++++++++++++++++++++
> > board/freescale/ls1021atwr/ls1021atwr.c | 60
> > +++++++++++++++++++++++
> > 4 files changed, 159 insertions(+)
> >
> > diff --git a/arch/arm/include/asm/arch-ls102xa/config.h
> > b/arch/arm/include/asm/arch-ls102xa/config.h
> > index c55cdef..a4a5d84 100644
> > --- a/arch/arm/include/asm/arch-ls102xa/config.h
> > +++ b/arch/arm/include/asm/arch-ls102xa/config.h
> > @@ -79,6 +79,21 @@
> > #define CONFIG_SYS_PCIE2_PHYS_ADDR
> (CONFIG_SYS_PCIE2_PHYS_BASE +
> > \
> >
> CONFIG_SYS_PCIE2_VIRT_ADDR)
> >
> > +/* SATA */
> > +#define AHCI_BASE_ADDR (CONFIG_SYS_IMMR
> + 0x02200000)
> > +#define CONFIG_BOARD_LATE_INIT
> > +#define CONFIG_CMD_SCSI
> > +#define CONFIG_LIBATA
> > +#define CONFIG_SCSI_AHCI
> > +#define CONFIG_SCSI_AHCI_PLAT
> > +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
> > +#define CONFIG_SYS_SCSI_MAX_LUN 1
> > +#define CONFIG_SYS_SCSI_MAX_DEVICE
> (CONFIG_SYS_SCSI_MAX_SCSI_ID
> > * \
> > +
> CONFIG_SYS_SCSI_MAX_LUN)
> > +#define CONFIG_CMD_FAT
> > +#define CONFIG_DOS_PARTITION
> > +#define CONFIG_SYS_FSL_ERRATUM_A008407
> > +
> > #ifdef CONFIG_DDR_SPD
> > #define CONFIG_SYS_FSL_DDR_BE
> > #define CONFIG_VERY_BIG_RAM
> > diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> > b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> > index d34044a..211fe1d 100644
> > --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> > +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> > @@ -397,4 +397,28 @@ struct ccsr_cci400 {
> > u8 res_e004[0x10000 - 0xe004];
> > };
> >
> > +/* AHCI (sata) register map */
> > +struct ccsr_ahci {
> > + u32 res1[0xa4/4]; /* 0x0 - 0xa4 */
> > + u32 pcfg; /* port config */
> > + u32 ppcfg; /* port phy1 config */
> > + u32 pp2c; /* port phy2 config */
> > + u32 pp3c; /* port phy3 config */
> > + u32 pp4c; /* port phy4 config */
> > + u32 pp5c; /* port phy5 config */
> > + u32 paxic; /* port AXI config */
> > + u32 axicc; /* AXI cache control */
> > + u32 axipc; /* AXI PROT control */
> > + u32 ptc; /* port Trans Config */
> > + u32 pts; /* port Trans Status */
> > + u32 plc; /* port link config */
> > + u32 plc1; /* port link config1 */
> > + u32 plc2; /* port link config2 */
> > + u32 pls; /* port link status */
> > + u32 pls1; /* port link status1 */
> > + u32 pcmdc; /* port CMD config */
> > + u32 ppcs; /* port phy control status */
> > + u32 pberr; /* port 0/1 BIST error */
> > + u32 cmds; /* port 0/1 CMD status error */
> > +};
> > #endif /* __ASM_ARCH_LS102XA_IMMAP_H_ */
> > diff --git a/board/freescale/ls1021aqds/ls1021aqds.c
> > b/board/freescale/ls1021aqds/ls1021aqds.c
> > index ce5cb52..c7ac953 100644
> > --- a/board/freescale/ls1021aqds/ls1021aqds.c
> > +++ b/board/freescale/ls1021aqds/ls1021aqds.c
> > @@ -18,6 +18,8 @@
> > #include <fsl_ifc.h>
> > #include <fsl_sec.h>
> > #include <spl.h>
> > +#include <ahci.h>
> > +#include <scsi.h>
> >
> > #include "../common/sleep.h"
> > #include "../common/qixis.h"
> > @@ -54,6 +56,51 @@ enum {
> > GE1_CLK125,
> > };
> >
> > +static void ls1021a_sata_init(void)
> > +{
> > + struct ccsr_ahci __iomem *ccsr_ahci = (void *)AHCI_BASE_ADDR;
> > +
> > +#ifdef CONFIG_SYS_FSL_ERRATUM_A008407
> > + unsigned int __iomem *dcfg_ecc = (void *)0x20220520; #endif
> [Alison Wang] Is it possible to use #define instead of magic number?
OK, sure , thanks.
Yuantian,
> > +
> > + out_le32(&ccsr_ahci->ppcfg, 0xa003fffe);
> > + out_le32(&ccsr_ahci->pp2c, 0x28183411);
> > + out_le32(&ccsr_ahci->pp3c, 0x0e081004);
> > + out_le32(&ccsr_ahci->pp4c, 0x00480811);
> > + out_le32(&ccsr_ahci->pp5c, 0x192c96a4);
> > + out_le32(&ccsr_ahci->ptc, 0x08000025);
> > +
> > +#ifdef CONFIG_SYS_FSL_ERRATUM_A008407
> > + out_le32(dcfg_ecc, 0x00020000);
> > +#endif
> > +}
> > +
> > +#ifdef CONFIG_SCSI_AHCI_PLAT
> > +static int ls1021a_sata_start(void)
> > +{
> > + struct ccsr_gur *gur = (struct ccsr_gur
> > *)CONFIG_SYS_FSL_GUTS_ADDR;
> > + u32 cfg;
> > + int rc = -1;
> > +
> > + cfg = in_be32(&gur->rcwsr[4]) & RCWSR4_SRDS1_PRTCL_MASK;
> > + cfg >>= RCWSR4_SRDS1_PRTCL_SHIFT;
> > +
> > + if (cfg != 0x30 && cfg != 0x70) {
> > + printf("SATA disabled: serdes protocol doesn't support\n");
> > + return rc;
> > + }
> > +
> > + rc = ahci_init((void __iomem *)AHCI_BASE_ADDR);
> > + if (rc)
> > + return rc;
> > +
> > + scsi_scan(0);
> > +
> > + return 0;
> > +}
> > +#endif
> > +
> > int checkboard(void)
> > {
> > #ifndef CONFIG_QSPI_BOOT
> > @@ -241,6 +288,8 @@ int board_early_init_f(void)
> > fsl_dp_disable_console();
> > #endif
> >
> > + ls1021a_sata_init();
> > +
> > return 0;
> > }
> >
> > @@ -601,6 +650,17 @@ int board_init(void)
> > return 0;
> > }
> >
> > +#ifdef CONFIG_BOARD_LATE_INIT
> > +int board_late_init(void)
> > +{
> > +#ifdef CONFIG_SCSI_AHCI_PLAT
> > + ls1021a_sata_start();
> > +#endif
> > +
> > + return 0;
> > +}
> > +#endif
> > +
> > #if defined(CONFIG_DEEP_SLEEP)
> > void board_sleep_prepare(void)
> > {
> > diff --git a/board/freescale/ls1021atwr/ls1021atwr.c
> > b/board/freescale/ls1021atwr/ls1021atwr.c
> > index 8fef8e9..a3d3806 100644
> > --- a/board/freescale/ls1021atwr/ls1021atwr.c
> > +++ b/board/freescale/ls1021atwr/ls1021atwr.c
> > @@ -22,6 +22,8 @@
> > #include <tsec.h>
> > #include <fsl_sec.h>
> > #include <spl.h>
> > +#include <ahci.h>
> > +#include <scsi.h>
> > #ifdef CONFIG_U_QE
> > #include "../../../drivers/qe/qe.h"
> > #endif
> > @@ -86,6 +88,51 @@ struct cpld_data {
> > u8 rev2; /* Reserved */
> > };
> >
> > +static void ls1021a_sata_init(void)
> > +{
> > + struct ccsr_ahci __iomem *ccsr_ahci = (void *)AHCI_BASE_ADDR;
> > +
> > +#ifdef CONFIG_SYS_FSL_ERRATUM_A008407
> > + unsigned int __iomem *dcfg_ecc = (void *)0x20220520; #endif
> [Alison Wang] Same.
> > +
> > + out_le32(&ccsr_ahci->ppcfg, 0xa003fffe);
> > + out_le32(&ccsr_ahci->pp2c, 0x28183411);
> > + out_le32(&ccsr_ahci->pp3c, 0x0e081004);
> > + out_le32(&ccsr_ahci->pp4c, 0x00480811);
> > + out_le32(&ccsr_ahci->pp5c, 0x192c96a4);
> > + out_le32(&ccsr_ahci->ptc, 0x08000025);
> > +
> > +#ifdef CONFIG_SYS_FSL_ERRATUM_A008407
> > + out_le32(dcfg_ecc, 0x00020000);
> > +#endif
> > +}
> > +
> > +#ifdef CONFIG_SCSI_AHCI_PLAT
> > +static int ls1021a_sata_start(void)
> > +{
> > + struct ccsr_gur *gur = (struct ccsr_gur
> > *)CONFIG_SYS_FSL_GUTS_ADDR;
> > + u32 cfg;
> > + int rc = -1;
> > +
> > + cfg = in_be32(&gur->rcwsr[4]) & RCWSR4_SRDS1_PRTCL_MASK;
> > + cfg >>= RCWSR4_SRDS1_PRTCL_SHIFT;
> > +
> > + if (cfg != 0x10 && cfg != 0x30 && cfg != 0x70) {
> > + printf("SATA disabled: serdes protocol doesn't support\n");
> > + return rc;
> > + }
> > +
> > + rc = ahci_init((void __iomem *)AHCI_BASE_ADDR);
> > + if (rc)
> > + return rc;
> > +
> > + scsi_scan(0);
> > +
> > + return 0;
> > +}
> > +#endif
> > +
> > #ifndef CONFIG_QSPI_BOOT
> > static void convert_serdes_mux(int type, int need_reset);
> >
> > @@ -388,6 +435,8 @@ int board_early_init_f(void)
> > out_le32(&cci->slave[2].sha_ord,
> > CCI400_SHAORD_NON_SHAREABLE);
> > }
> >
> > + ls1021a_sata_init();
> > +
> > return 0;
> > }
> >
> > @@ -529,6 +578,17 @@ struct smmu_stream_id dev_stream_id[] = {
> > { 0x18c, 0x0e, "DEBUG" },
> > };
> >
> > +#ifdef CONFIG_BOARD_LATE_INIT
> > +int board_late_init(void)
> > +{
> > +#ifdef CONFIG_SCSI_AHCI_PLAT
> > + ls1021a_sata_start();
> > +#endif
> > +
> > + return 0;
> > +}
> > +#endif
> > +
> > int board_init(void)
> > {
> > #ifndef CONFIG_SYS_FSL_NO_SERDES
> > --
> > 2.1.0.27.g96db324
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