[U-Boot] [PATCH 1/1] arm: ls102xa: timer: Fix undefined behavior

[Huan Wang]

> -----Original Message-----
> From: Alexander Stein [mailto:alexander.stein at systec-electronic.com]
> Sent: Wednesday, August 12, 2015 9:56 PM
> To: u-boot at lists.denx.de; Albert Aribaud; Jingchang Lu; Kushwaha
> Prabhakar-B32579; Wang Huan-B18965; Jin Zhengxiong-R64188; Wang Huan-
> B18965; Sun York-R58495; Lian Minghuan-B31939; Tang Yuantian-B29983;
> Badola Nikhil-B46172
> Cc: Alexander Stein
> Subject: [PATCH 1/1] arm: ls102xa: timer: Fix undefined behavior
> 
> PL1 Physical Comp Value is set in inline assembly by using mcrr.
> The %Q0 and %R0 modifier required a 64-bit argument but only a 32-bit
> is passed. This results in the following code:
> [...]
> 82000ccc:       e3e03000        mvn     r3, #0
> 82000cd0:       ec443f2e        mcrr    15, 2, r3, r4, cr14
> [...]
> While r4 is uninitialized it depends on the value in initcall_run_list
> how the timer is programmed.
> It has been observed that this code works by coincidence with one
> toolchain while it breaks with another one which uses different
> registers in initcall_run_list.
> Fix this by actually using a 64-bit variable.
> 
> Signed-off-by: Alexander Stein <alexander.stein at systec-electronic.com>
> ---
>  arch/arm/cpu/armv7/ls102xa/timer.c                | 3 ++-
>  arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +-
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c
> b/arch/arm/cpu/armv7/ls102xa/timer.c
> index 11b17b2..f964288 100644
> --- a/arch/arm/cpu/armv7/ls102xa/timer.c
> +++ b/arch/arm/cpu/armv7/ls102xa/timer.c
> @@ -56,7 +56,8 @@ static inline unsigned long long us_to_tick(unsigned
> long long usec)  int timer_init(void)  {
>  	struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
> -	unsigned long ctrl, val, freq;
> +	unsigned long ctrl, freq;
> +	u64 val;
> 
>  	/* Enable System Counter */
>  	writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr); diff --git
> a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> index d34044a..e45c20e 100644
> --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> @@ -31,7 +31,7 @@
>  #define RCWSR4_SRDS1_PRTCL_SHIFT	24
>  #define RCWSR4_SRDS1_PRTCL_MASK		0xff000000
> 
> -#define TIMER_COMP_VAL			0xffffffff
> +#define TIMER_COMP_VAL			~0ULL
>  #define ARCH_TIMER_CTRL_ENABLE		(1 << 0)
>  #define SYS_COUNTER_CTRL_ENABLE		(1 << 24)
> 
[Alison Wang] Please refer to the comments in this link http://patchwork.ozlabs.org/patch/495476/ .

Best Regards,
Alison Wang