[U-Boot] [PATCH 7/8] x86: crownbay: Support Topcliff integrated pci uart devices

Bin Meng bmeng.cn at gmail.com
Sat Aug 15 09:07:49 CEST 2015


Use new PCI_SERIAL driver to support Topcliff integrated pci uart
devices on Intel Crown Bay board.

Signed-off-by: Bin Meng <bmeng.cn at gmail.com>

---

 arch/x86/dts/crownbay.dts  | 8 ++++----
 configs/crownbay_defconfig | 1 +
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 3af9cc3..841f47e 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -114,7 +114,7 @@
 							"pci8086,8811",
 							"pciclass,070002",
 							"pciclass,0700",
-							"x86-uart";
+							"pci-uart";
 					reg = <0x00025100 0x0 0x0 0x0 0x0
 					       0x01025110 0x0 0x0 0x0 0x0>;
 					reg-shift = <0>;
@@ -127,7 +127,7 @@
 							"pci8086,8812",
 							"pciclass,070002",
 							"pciclass,0700",
-							"x86-uart";
+							"pci-uart";
 					reg = <0x00025200 0x0 0x0 0x0 0x0
 					       0x01025210 0x0 0x0 0x0 0x0>;
 					reg-shift = <0>;
@@ -140,7 +140,7 @@
 							"pci8086,8813",
 							"pciclass,070002",
 							"pciclass,0700",
-							"x86-uart";
+							"pci-uart";
 					reg = <0x00025300 0x0 0x0 0x0 0x0
 					       0x01025310 0x0 0x0 0x0 0x0>;
 					reg-shift = <0>;
@@ -153,7 +153,7 @@
 							"pci8086,8814",
 							"pciclass,070002",
 							"pciclass,0700",
-							"x86-uart";
+							"pci-uart";
 					reg = <0x00025400 0x0 0x0 0x0 0x0
 					       0x01025410 0x0 0x0 0x0 0x0>;
 					reg-shift = <0>;
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index aa1232d..9113eb7 100644
--- a/configs/crownbay_defconfig
+++ b/configs/crownbay_defconfig
@@ -19,6 +19,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_CPU=y
 CONFIG_DM_PCI=y
 CONFIG_SPI_FLASH=y
+CONFIG_PCI_SERIAL=y
 CONFIG_VIDEO_VESA=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
 CONFIG_DM_RTC=y
-- 
1.8.2.1



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