[U-Boot] [PATCH v3 01/16] spi: Add zynq qspi controller driver

Simon Glass sjg at chromium.org
Tue Aug 18 03:59:59 CEST 2015


On 17 August 2015 at 07:30, Jagan Teki <jteki at openedev.com> wrote:
> Added zynq qspi controller driver for Xilinx Zynq APSOC,
> this driver is driver-model driven with devicetree support.
>
> => sf probe
> SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB
> => mw.b 0x100 0xCC 0x1000000
> => sf update 0x100 0x0 0x1000000
> device 0 whole chip
> 16777216 bytes written, 0 bytes skipped in 59.842s, speed 289262 B/s
> => sf read 0x3000000 0x0 0x1000000
> device 0 whole chip
> SF: 16777216 bytes @ 0x0 Read: OK
> => cmp.b 0x3000000 0x100 0x1000000
> Total of 16777216 byte(s) were the same
>
> Signed-off-by: Jagan Teki <jteki at openedev.com>
> Cc: Simon Glass <sjg at chromium.org>
> Cc: Michal Simek <michal.simek at xilinx.com>
> Cc: Siva Durga Prasad Paladugu <sivadur at xilinx.com>
> Tested-by: Jagan Teki <jteki at openedev.com>
> ---
>  drivers/spi/Makefile    |   1 +
>  drivers/spi/zynq_qspi.c | 622 ++++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 623 insertions(+)
>  create mode 100644 drivers/spi/zynq_qspi.c

Reviewed-by: Simon Glass <sjg at chromium.org>


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