[U-Boot] [PATCH v2 7/7] sf: Add FSR support to spi_flash_cmd_wait_ready

Jagan Teki jteki at openedev.com
Wed Aug 19 09:35:32 CEST 2015


On 19 August 2015 at 04:28, Marek Vasut <marex at denx.de> wrote:
> On Wednesday, August 19, 2015 at 12:36:40 AM, Jagan Teki wrote:
>> On 19 August 2015 at 03:33, Marek Vasut <marex at denx.de> wrote:
>> > On Monday, August 17, 2015 at 12:32:54 PM, Jagan Teki wrote:
>> >> This patch adds flag status register reading support to
>> >> spi_flash_cmd_wait_ready.
>> >>
>> >> Signed-off-by: Jagan Teki <jteki at openedev.com>
>> >> Cc: Simon Glass <sjg at chromium.org>
>> >> Cc: Marek Vasut <marex at denx.de>
>> >> Cc: Michal Simek <michal.simek at xilinx.com>
>> >> Cc: Siva Durga Prasad Paladugu <sivadur at xilinx.com>
>> >> Cc: Stefan Roese <sr at denx.de>
>> >> Cc: Tom Warren <twarren at nvidia.com>
>> >> Cc: Bin Meng <bmeng.cn at gmail.com>
>> >> Cc: Tom Rini <trini at konsulko.com>
>> >> Cc: Hou Zhiqiang <B48286 at freescale.com>
>> >> Tested-by: Jagan Teki <jteki at openedev.com>
>> >> ---
>> >>
>> >>  drivers/mtd/spi/sf_internal.h |  1 +
>> >>  drivers/mtd/spi/sf_ops.c      | 66
>> >>
>> >> +++++++++++++++++++++++++++++++++++++++---- drivers/mtd/spi/sf_probe.c
>> >>
>> >> |  4 +--
>> >>
>> >>  include/spi_flash.h           |  2 --
>> >>  4 files changed, 62 insertions(+), 11 deletions(-)
>> >>
>> >> diff --git a/drivers/mtd/spi/sf_internal.h
>> >> b/drivers/mtd/spi/sf_internal.h index e97c716..4ecfd0c 100644
>> >> --- a/drivers/mtd/spi/sf_internal.h
>> >> +++ b/drivers/mtd/spi/sf_internal.h
>> >> @@ -49,6 +49,7 @@ enum {
>> >>
>> >>  enum spi_nor_option_flags {
>> >>
>> >>       SNOR_F_SST_WR           = (1 << 0),
>> >>
>> >> +     SNOR_F_USE_FSR          = (1 << 1),
>> >>
>> >>  };
>> >>
>> >>  #define SPI_FLASH_3B_ADDR_LEN                3
>> >>
>> >> diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
>> >> index 7d7c264..a5487ad 100644
>> >> --- a/drivers/mtd/spi/sf_ops.c
>> >> +++ b/drivers/mtd/spi/sf_ops.c
>> >> @@ -40,6 +40,21 @@ int spi_flash_cmd_read_status(struct spi_flash
>> >> *flash, u8 *rs) return 0;
>> >>
>> >>  }
>> >>
>> >> +static int read_fsr(struct spi_flash *flash, u8 *fsr)
>> >> +{
>> >> +     int ret;
>> >> +     u8 cmd;
>> >> +
>> >> +     cmd = CMD_FLAG_STATUS;
>> >> +     ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
>> >> +     if (ret < 0) {
>> >> +             debug("SF: fail to read flag status register\n");
>> >> +             return ret;
>> >> +     }
>> >> +
>> >> +     return 0;
>> >> +}
>> >> +
>> >>
>> >>  int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
>> >>  {
>> >>
>> >>       u8 cmd;
>> >>
>> >> @@ -138,24 +153,63 @@ static void spi_flash_dual_flash(struct spi_flash
>> >> *flash, u32 *addr) }
>> >>
>> >>  #endif
>> >>
>> >> +static inline int spi_flash_sr_ready(struct spi_flash *flash)
>> >> +{
>> >> +     u8 sr;
>> >> +     int ret;
>> >> +
>> >> +     ret = spi_flash_cmd_read_status(flash, &sr);
>> >> +     if (ret < 0)
>> >> +             return ret;
>> >> +
>> >> +     if (sr < 0)
>> >
>> > Have you ever seen u8 value that's < 0 ? :-)
>>
>> Yes, over looked, It's been fixed on next patches as well.
>
> Please don't apply broken code, fix this and repost.

I don't know what your talking about, there is patch already submitted
with this fix and even you're CCed [1]

[1] https://patchwork.ozlabs.org/patch/508166/

thanks!
-- 
Jagan | openedev.


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