[U-Boot] [PATCH v2 07/12] x86: fsp: Call fsp_init_phase_pci() in pci_uclass_post_probe()

Simon Glass sjg at chromium.org
Sat Aug 22 01:27:39 CEST 2015


Hi Bin,

On 20 August 2015 at 07:40, Bin Meng <bmeng.cn at gmail.com> wrote:
> Per Intel FSP specification, we should call FSP notify API to
> inform FSP that PCI enumeration has been done so that FSP will
> do any necessary initialization as required by the chipset's
> BIOS Writer's Guide (BWG).
>
> Unfortunately we have to put this call here as with driver model,
> the enumeration is all done on a lazy basis as needed, so until
> something is touched on PCI it won't happen.
>
> Note we only call this after U-Boot is relocated and root bus has
> finished probing.
>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> ---
>
> Changes in v2: None
>
>  drivers/pci/pci-uclass.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>

Acked-by: Simon Glass <sjg at chromium.org>

Please see below.

> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> index 4160274..c90e7ac 100644
> --- a/drivers/pci/pci-uclass.c
> +++ b/drivers/pci/pci-uclass.c
> @@ -14,6 +14,9 @@
>  #include <dm/lists.h>
>  #include <dm/root.h>
>  #include <dm/device-internal.h>
> +#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)

Do we need CONFIG_X86 here? Do you think it is better to have it to be clearer?

> +#include <asm/fsp/fsp_support.h>
> +#endif
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> @@ -749,6 +752,24 @@ static int pci_uclass_post_probe(struct udevice *bus)
>         ret = pci_auto_config_devices(bus);
>  #endif
>
> +#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
> +       /*
> +        * Per Intel FSP specification, we should call FSP notify API to
> +        * inform FSP that PCI enumeration has been done so that FSP will
> +        * do any necessary initialization as required by the chipset's
> +        * BIOS Writer's Guide (BWG).
> +        *
> +        * Unfortunately we have to put this call here as with driver model,
> +        * the enumeration is all done on a lazy basis as needed, so until
> +        * something is touched on PCI it won't happen.
> +        *
> +        * Note we only call this 1) after U-Boot is relocated, and 2)
> +        * root bus has finished probing.
> +        */
> +       if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0))
> +               ret = fsp_init_phase_pci();
> +#endif
> +
>         return ret < 0 ? ret : 0;
>  }
>
> --
> 1.8.2.1
>

Regards,
Simon


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