[U-Boot] [PATCH v2 3/7] x86: baytrail: Support multiple microcode copies

Simon Glass sjg at chromium.org
Sat Aug 22 06:19:48 CEST 2015


On 15 August 2015 at 14:37, Simon Glass <sjg at chromium.org> wrote:
> From: Bin Meng <bmeng.cn at gmail.com>
>
> Intel FSP has the capability to walk through the microcode blocks
> which are passed as the TempRamInit() parameter from U-Boot and
> finds the most appropriate microcode which is suitable for the cpu
> on which it is running. Now we've seen several steppings for Intel
> BayTrail series processors, adding those microcodes to the Intel
> BayleyBay and MinnowMax board device tree files.
>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> Changes in v2:
> - Adjust to use separate nodes for each microcode block
>
>  arch/x86/dts/bayleybay.dts | 6 ++++++
>  arch/x86/dts/minnowmax.dts | 3 +++
>  2 files changed, 9 insertions(+)

Applied to u-boot-x86, thanks!


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