[U-Boot] 2015.10-rc2 Chromebook Snow boot failure
Misha Komarovskiy
zombah at gmail.com
Mon Aug 24 21:50:59 CEST 2015
Hello Simon,
On Mon, Aug 24, 2015 at 7:58 PM, Simon Glass <sjg at chromium.org> wrote:
> Hi Misha,
>
> On 24 August 2015 at 03:55, Misha Komarovskiy <zombah at gmail.com> wrote:
> > Hello Simon,
> > Confirmed, with vdd_arm set 1.1, snow boots fine.
> > ---
> > Best Regards,
> > Misha Komarovskiy
> > zombahatgmaildotcom
>
> Please avoid top posting as it leads to a confusing thread.
>
>
Will follow this rule in future.
> Would you like to send a patch to update this?
>
>
Sure i can, it is easy with advice your gave.
Better to use if condition CONFIG_TARGET_SNOW or rise
overall vdd_arm clock?
> >
> >
> > On Mon, Aug 24, 2015 at 12:31 PM, Misha Komarovskiy <zombah at gmail.com>
> wrote:
> >> Hello Simon,
> >> 2015.07 and 2015.10-rc1 both boot fine. I use this U-Boot as third
> >> stage from SD card/USB stick, im not quite
> >> sure what right name for this position from reset vector.
> >> I will try to increase ret = exynos_set_regulator("vdd_arm",
> >> 1000000); to 1100000 and report result.
>
> You say it is a 3rd-stage - does that mean you are booting U-Boot
> after the existing SPL and U-Boot have already run? That would explain
> the problem, since the built-in U-Boot sets the CPU speed to maximum.
>
>
openSUSE, my linux distro, use chained nv-U-Boot method: factory bootloaders
stay on their places, USB Boot triggered by enabling dev mode in Chrome OS
and ctrl-U combo on power on to read second stage Das U-Boot from SD card
or
USB storage, which is upsream version.
> We don't have support for CPU clock adjustment in mainline yet.
>
> >> ---
> >> Best Regards,
> >> Misha Komarovskiy
> >> zombahatgmaildotcom
> >>
> >>
> >> On Mon, Aug 24, 2015 at 12:21 AM, Simon Glass <sjg at chromium.org> wrote:
> >>> Hi,
> >>>
> >>> On 21 August 2015 at 09:55, Misha Komarovskiy <zombah at gmail.com>
> wrote:
> >>>> Hello,
> >>>> I have failure in attempt to boot Chromebook Snow with 2015.10-rc2
> >>>> build snow_defconfig, here is error message, it maybe not full as i
> >>>> have some noise on serial console with device:
> >>>>
> >>>> U-Boot 2015.10-rc2 (Aug 21 2015 - 15:43:43 +0000) for snow
> >>>> GPU: Exynos5250 @ 1.7 GHz
> >>>> Model: Google Snow
> >>>> Board: Google Snow
> >>>> DRAM: 2 GiB
> >>>> ERROR: read error from device: bad39118 register: 0x1e!
> >>>> at drivers/power/pmic/max77686.c:44/max77686_read()
> >>>> initcall sequence bfdaf3bc failed at call 43e0418c (err=-5)
> >>>> ### ERROR ### Please RESET the board ###
> >>>
> >>> Register 1e is the BUCK3 voltage - see max77686.h.
> >>>
> >>> I don't get the same addresses as you but I suppose we are using
> >>> different toolchains.
> >>>
> >>> But this is probably being called from exynos_power_init().
> >>>
> >>> The ARM voltage is set to 1.0V. I wonder if that is borderline? We
> >>> could increase it perhaps to 1.1V. - See the exynos_set_regulator()
> >>> line for vdd_arm.
> >>>
> >>> It was previous 1.3V in 2015.07 - see max77686_init().
> >>>
> >>> Are you starting U-Boot SPL directly from the reset vector?
> >>>
> >>> Regards,
> >>> Simon
>
> Regards,
> Simon
>
---
Best Regards,
Misha Komarovskiy
zombahatgmaildotcom
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