[U-Boot] [PATCH] ARM: imx: fsl_esdhc: fix usage of low 4 bits of sysctl register

Eric Nelson eric at nelint.com
Fri Dec 4 19:53:56 CET 2015


Thanks Hector,

On 12/04/2015 11:39 AM, Hector Palacios wrote:
> Hi,
> 
> On 12/04/2015 06:32 PM, Eric Nelson wrote:
>> The low four bits of the SYSCTL register are reserved on the USDHC
>> controller on i.MX6 and i.MX7 processors, but are used for clocking
>> operations on earlier models.
>>
>> Guard against their usage by hiding the bit mask macros on those
>> processors.
>>
...

>> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
>> index aa1b4cf..a4b87ce 100644
>> --- a/include/fsl_esdhc.h
>> +++ b/include/fsl_esdhc.h
>> @@ -25,10 +25,12 @@
>>  #define SYSCTL_INITA		0x08000000
>>  #define SYSCTL_TIMEOUT_MASK	0x000f0000
>>  #define SYSCTL_CLOCK_MASK	0x0000fff0
>> +#if !defined(CONFIG_MX6)
> 
> Per your commit message should this be
> #if (!defined(CONFIG_MX6) && !defined(CONFIG_MX7))
> 

Good catch.

Will fix in a V2.



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