[U-Boot] [PATCH] ARM: imx: fsl_esdhc: fix usage of low 4 bits of sysctl register

[Eric Nelson]

Thanks Hector,

On 12/04/2015 11:51 AM, Hector Palacios wrote:
> On 12/04/2015 07:33 PM, Eric Nelson wrote:
>> On 12/04/2015 10:43 AM, Eric Nelson wrote:
...

>> From what I can tell, the linux kernel doesn't do this test and
>> doesn't appear to have any trouble.
>>
>> What code base are you running against (u-boot-imx/master)?
> 
> I'm running v2015.04 on a non-upstream platform.
> 

Thanks.

>> What do you see if you do the same?
> 
> The command takes a while and it is erasing all blocks.
> I still get a timeout error at the end and a zero number of sectors, though.
> 
> => mmc erase 441000 10000
> 
> MMC erase: dev # 0, block # 4460544, count 65536 ... Timeout waiting card ready
> 0 blocks erased: ERROR
> 

Erasing 64K blocks should take a while, but I'm not sure why
you're seeing things die at the end.

U-Boot > time mmc erase 441000 10000
MMC erase: dev # 0, block # 4460544, count 65536 ... 65536 blocks erased: OK
time: 28.704 seconds

I did some more testing to see if the prsstat register is accurately
reflecting the state of dat0 by setting the SION bit in the mux ctrl
register for my DAT0 (SD4_DAT0 on an i.MX6Q).

I found that the pin is reading as low through the GPIO2_PSR register
(bit 8):

U-Boot > mmc erase 4000 1000
MMC erase: dev # 0, block # 16384, count 4096 ... Timeout waiting for
DAT0 to go high!
irqstat 0x00000001
GPIO2_PSR(020a0008) == 0xc80000d6
...

The pin shows up as high when idle, reflecting the internal pullup:

U-Boot > md.l 0x020a0008 1
020a0008: c80001d6                               ....

I've tested with stronger pull-ups without success, and testing
with a longer timeout indicates that this isn't a slew rate problem.