[U-Boot] [PATCH V2] ARM: imx: fsl_esdhc: fix usage of low 4 bits of sysctl register

[Fabio Estevam]

On Fri, Dec 4, 2015 at 5:32 PM, Eric Nelson <eric at nelint.com> wrote:
> The low four bits of the SYSCTL register are reserved on the USDHC
> controller on i.MX6 and i.MX7 processors, but are used for clocking
> operations on earlier models.
>
> Guard against their usage by hiding the bit mask macros on those
> processors.
>
> These bits are used to prevent glitches when changing clocks on
> i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7.
>
> From the i.MX6DQ RM:
>         To prevent possible glitch on the card clock, clear the
>         FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS
>         or DVS in System Control Register) or setting RSTA bit.
>
> Signed-off-by: Eric Nelson <eric at nelint.com>

Reviewed-by: Fabio Estevam <fabio.estevam at freescale.com>