[U-Boot] [PATCH v2 06/14] net: emaclite: Use indirect register access for TX reset

[Michal Simek]

Move to use indirect register access when timeout expires for resetting
TX buffers.

Signed-off-by: Michal Simek <michal.simek at xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger at ni.com>
---

Changes in v2: None

 drivers/net/xilinx_emaclite.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
index 724b61e0b7e1..72b6e0ac424a 100644
--- a/drivers/net/xilinx_emaclite.c
+++ b/drivers/net/xilinx_emaclite.c
@@ -408,6 +408,7 @@ static int emaclite_send(struct eth_device *dev, void *ptr, int len)
 	u32 reg;
 	u32 baseaddress;
 	struct xemaclite *emaclite = dev->priv;
+	struct emaclite_regs *regs = emaclite->regs;
 
 	u32 maxtry = 1000;
 
@@ -422,10 +423,9 @@ static int emaclite_send(struct eth_device *dev, void *ptr, int len)
 	if (!maxtry) {
 		printf("Error: Timeout waiting for ethernet TX buffer\n");
 		/* Restart PING TX */
-		out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
+		out_be32(&regs->tx_ping_tsr, 0);
 		if (emaclite->txpp) {
-			out_be32 (dev->iobase + XEL_TSR_OFFSET +
-				XEL_BUFFER_OFFSET, 0);
+			out_be32(&regs->tx_pong_tsr, 0);
 		}
 		return -1;
 	}
-- 
1.9.1