[U-Boot] [PATCH] sunxi: Support the FEL boot mode in the regular u-boot build

[Hans de Goede]

Hi,

On 16-02-15 09:23, Siarhei Siamashka wrote:
> So that the CONFIG_SPL_FEL option is not needed anymore. And the regular
> SPL binary, generated by the default u-boot build, is now also bootable
> over USB in the FEL mode. The SPL still can boot from the SD card too.
>
> A bunch of system registers need to be saved/restored in order to ensure
> that the IRQ handler still works in the BROM FEL code after getting
> control back from the SPL. This is done in the sunxi code instead of
> abusing ifdefs in 'start.S'.
>
> The decision whether to load the main u-boot binary from the SD card or
> return to the FEL code in the BROM is done at runtime.
>
> Signed-off-by: Siarhei Siamashka <siarhei.siamashka at gmail.com>

Thanks, applied to u-boot-sunxi/next and included in the pull-req
which I've just send out. Note I've might a slight change, instead
of adding the #ifndef CONFIG_SPL_FEL to not restore the extra
regs in fel_utils.S, I've removed the #ifdef-s CONFIG_SPL_FEL from
start.S (effectively reverting a small part of Simon's patch) as it
is cleaner to not have sunxi specific #ifdef-s in start.S .

Regards,

Hans

> ---
>
> This patch needs to be applied after Simon's FEL patches:
>      http://patchwork.ozlabs.org/patch/437580/
>      http://patchwork.ozlabs.org/patch/437581/
>      http://patchwork.ozlabs.org/patch/437582/
>
> The CONFIG_SPL_FEL option can be still kept during the transition period.
>
> But we really need to get rid of this special CONFIG_SPL_FEL option as soon
> as possible. Because it is an extra maintenance burden and also introduces
> restrictions, such as the SPL size limit. Which hinders the addition of
> useful features to the SPL.
>
>   arch/arm/cpu/armv7/sunxi/board.c     | 35 +++++++++++++++++++++++++++++------
>   arch/arm/cpu/armv7/sunxi/fel_utils.S | 23 +++++++++++++++++++++++
>   2 files changed, 52 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
> index b7492ac..c02c015 100644
> --- a/arch/arm/cpu/armv7/sunxi/board.c
> +++ b/arch/arm/cpu/armv7/sunxi/board.c
> @@ -30,6 +30,10 @@
>   struct fel_stash {
>   	uint32_t sp;
>   	uint32_t lr;
> +	uint32_t cpsr;
> +	uint32_t sctlr;
> +	uint32_t vbar;
> +	uint32_t cr;
>   };
>
>   struct fel_stash fel_stash __attribute__((section(".data")));
> @@ -108,15 +112,34 @@ void s_init(void)
>    */
>   u32 spl_boot_device(void)
>   {
> +#ifdef CONFIG_SPL_FEL
>   	/*
> -	 * Have we been asked to return to the FEL portion of the boot ROM?
> -	 * TODO: We need a more robust test here, or bracket this with
> -	 * #ifdef CONFIG_SPL_FEL.
> +	 * This is the legacy compile time configuration for a special FEL
> +	 * enabled build. It has many restrictions and can only boot over USB.
>   	 */
> -	if (fel_stash.lr >= 0xffff0000 && fel_stash.lr < 0xffff4000)
> +	return BOOT_DEVICE_BOARD;
> +#else
> +	/*
> +	 * When booting from the SD card, the "eGON.BT0" signature is expected
> +	 * to be found in memory at the address 0x0004 (see the "mksunxiboot"
> +	 * tool, which generates this header).
> +	 *
> +	 * When booting in the FEL mode over USB, this signature is patched in
> +	 * memory and replaced with something else by the 'fel' tool. This other
> +	 * signature is selected in such a way, that it can't be present in a
> +	 * valid bootable SD card image (because the BROM would refuse to
> +	 * execute the SPL in this case).
> +	 *
> +	 * This branch is just making a decision at runtime whether to load
> +	 * the main u-boot binary from the SD card (if the "eGON.BT0" signature
> +	 * is found) or return to the FEL code in the BROM to wait and receive
> +	 * the main u-boot binary over USB.
> +	 */
> +	if (readl(4) == 0x4E4F4765 && readl(8) == 0x3054422E) /* eGON.BT0 */
> +		return BOOT_DEVICE_MMC1;
> +	else
>   		return BOOT_DEVICE_BOARD;
> -
> -	return BOOT_DEVICE_MMC1;
> +#endif
>   }
>
>   /* No confirmation data available in SPL yet. Hardcode bootmode */
> diff --git a/arch/arm/cpu/armv7/sunxi/fel_utils.S b/arch/arm/cpu/armv7/sunxi/fel_utils.S
> index 0c1de52..e1b28a3 100644
> --- a/arch/arm/cpu/armv7/sunxi/fel_utils.S
> +++ b/arch/arm/cpu/armv7/sunxi/fel_utils.S
> @@ -15,11 +15,34 @@ ENTRY(save_boot_params)
>   	ldr	r0, =fel_stash
>   	str	sp, [r0, #0]
>   	str	lr, [r0, #4]
> +	mrs	lr, cpsr		@ Read CPSR
> +	str	lr, [r0, #8]
> +	mrc	p15, 0, lr, c1, c0, 0	@ Read CP15 SCTLR Register
> +	str	lr, [r0, #12]
> +	mrc	p15, 0, lr, c12, c0, 0	@ Read VBAR
> +	str	lr, [r0, #16]
> +	mrc	p15, 0, lr, c1, c0, 0	@ Read CP15 Control Register
> +	str	lr, [r0, #20]
>   	b	save_boot_params_ret
>   ENDPROC(save_boot_params)
>
>   ENTRY(return_to_fel)
>   	mov	sp, r0
>   	mov	lr, r1
> +#ifndef CONFIG_SPL_FEL
> +	/*
> +	 * The CONFIG_SPL_FEL build skips setting these registers,
> +	 * so there is no need to restore them here.
> +	 */
> +	ldr	r0, =fel_stash
> +	ldr	r1, [r0, #20]
> +	mcr	p15, 0, r1, c1, c0, 0	@ Write CP15 Control Register
> +	ldr	r1, [r0, #16]
> +	mcr	p15, 0, r1, c12, c0, 0	@ Write VBAR
> +	ldr	r1, [r0, #12]
> +	mcr	p15, 0, r1, c1, c0, 0	@ Write CP15 SCTLR Register
> +	ldr	r1, [r0, #8]
> +	msr	cpsr, r1		@ Write CPSR
> +#endif
>   	bx	lr
>   ENDPROC(return_to_fel)
>