[U-Boot] [PATCH v3 04/11] Exynos542x: Add workaround for ARM errata 799270
Siarhei Siamashka
siarhei.siamashka at gmail.com
Wed Feb 18 12:12:47 CET 2015
On Wed, 18 Feb 2015 15:16:28 +0530
Akshay Saraswat <akshay.s at samsung.com> wrote:
> This patch adds workaround for the ARM errata 799270 which says
> "If the L2 cache logic clock is stopped because of L2 inactivity,
> setting or clearing the ACTLR.SMP bit might not be effective. The bit is
> modified in the ACTLR, meaning a read of the register returns the
> updated value. However the logic that uses that bit retains the previous
> value."
>
> Signed-off-by: Kimoon Kim <kimoon.kim at samsung.com>
> Signed-off-by: Akshay Saraswat <akshay.s at samsung.com>
> Reviewed-by: Simon Glass <sjg at chromium.org>
> Tested-by: Simon Glass <sjg at chromium.org>
> ---
> Changes since v2:
> - No change.
>
> Changes since v1:
> - Added Reviewed-by & Tested-by.
>
> arch/arm/cpu/armv7/exynos/lowlevel_init.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/exynos/lowlevel_init.c b/arch/arm/cpu/armv7/exynos/lowlevel_init.c
> index 7335a1e..bbcae4c 100644
> --- a/arch/arm/cpu/armv7/exynos/lowlevel_init.c
> +++ b/arch/arm/cpu/armv7/exynos/lowlevel_init.c
> @@ -46,6 +46,28 @@ enum {
>
> #ifdef CONFIG_EXYNOS5420
> /*
> + * Ensure that the L2 logic has been used within the previous 256 cycles
> + * before modifying the ACTLR.SMP bit. This is required during boot before
> + * MMU has been enabled, or during a specified reset or power down sequence.
> + */
> +void enable_smp(void)
> +{
> + uint32_t temp, val;
> +
> + /* Enable SMP mode */
> + mrc_auxr(temp);
> + temp |= (1 << 6);
> +
> + /* Dummy read to assure L2 access */
> + val = readl(EXYNOS5420_INFORM_BASE);
> + val &= 0;
> + temp |= val;
Wouldn't the compiler happily optimize out some parts of this code?
> + mcr_auxr(temp);
> + dsb();
> + isb();
> +}
This looks like a general purpose ARM Cortex-A15 workaround too. Except
that the EXYNOS5420_INFORM_BASE address is Exynos specific.
--
Best regards,
Siarhei Siamashka
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