[U-Boot] [PATCH V3 04/11] ARM: Introduce erratum workaround for 621766

Nishanth Menon nm at ti.com
Wed Feb 25 21:55:12 CET 2015


621766: Under a specific set of conditions, executing a sequence of
	NEON or vfp load instructions can cause processor deadlock
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set L1NEON to 1

Based on ARM errata Document revision 20.0 (13 Nov 2010)

Signed-off-by: Nishanth Menon <nm at ti.com>
---
 README                     |    1 +
 arch/arm/cpu/armv7/start.S |   11 +++++++++++
 2 files changed, 12 insertions(+)

diff --git a/README b/README
index 484ae9ee39a8..5ee789aea627 100644
--- a/README
+++ b/README
@@ -626,6 +626,7 @@ The following options need to be configured:
 		specific checks, but expect no product checks.
 		CONFIG_ARM_ERRATA_430973
 		CONFIG_ARM_ERRATA_454179
+		CONFIG_ARM_ERRATA_621766
 		CONFIG_ARM_ERRATA_798870
 
 - Driver Model
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 45e8578db60c..2d92276a0475 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -205,6 +205,17 @@ skip_errata_454179:
 skip_errata_430973:
 #endif
 
+#ifdef CONFIG_ARM_ERRATA_621766
+	cmp	r2, #0x21		@ Only on < r2p1
+	blt	skip_errata_621766
+
+	mrc	p15, 0, r0, c1, c0, 1	@ Read ACR
+	orr	r0, r0, #(0x1 << 5)	@ Set L1NEON bit
+	b	v7_arch_cp15_set_acr
+
+skip_errata_621766:
+#endif
+
 	mov	pc, lr			@ back to my caller
 ENDPROC(cpu_init_cp15)
 
-- 
1.7.9.5



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