[U-Boot] [PATCH 05/12] sunxi: Move setting of CPU system control register SMP bit to save_boot_params

Hans de Goede hdegoede at redhat.com
Thu Jan 15 15:52:27 CET 2015


According to the "Cortex-A7 MPCore Technical Reference Manual":

"You must ensure this bit is set to 1 before the caches and MMU are enabled,
or any cache and TLB maintenance operations are performed."

Since arch/arm/cpu/armv7/start.S: cpu_init_cp15 does several cache operations,
we should thus enable the SMP bit earlier, and the only chance to do that is
to do it at save_boot_params time.

This does not seem to make any noticable difference, but:
1) According to the manual it is the right thing to do
2) We need to do other magic really early on for sun9i (A80) support, so we
   need to introduce a lowlevel_init.S / save_boot_params function anyways

Signed-off-by: Hans de Goede <hdegoede at redhat.com>
---
 arch/arm/cpu/armv7/sunxi/Makefile        |  1 +
 arch/arm/cpu/armv7/sunxi/board.c         |  8 --------
 arch/arm/cpu/armv7/sunxi/lowlevel_init.S | 23 +++++++++++++++++++++++
 3 files changed, 24 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/sunxi/lowlevel_init.S

diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
index 1720f7d..3a6aa6d 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -7,6 +7,7 @@
 #
 # SPDX-License-Identifier:	GPL-2.0+
 #
+obj-y	+= lowlevel_init.o
 obj-y	+= timer.o
 obj-y	+= board.o
 obj-y	+= clock.o
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index bc98c56..4449942 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -120,14 +120,6 @@ void s_init(void)
 	 * access gets messed up (seems cache related) */
 	setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800);
 #endif
-#if !defined CONFIG_SPL_BUILD && (defined CONFIG_MACH_SUN7I || \
-		defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I)
-	/* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */
-	asm volatile(
-		"mrc p15, 0, r0, c1, c0, 1\n"
-		"orr r0, r0, #1 << 6\n"
-		"mcr p15, 0, r0, c1, c0, 1\n");
-#endif
 
 	clock_init();
 	timer_init();
diff --git a/arch/arm/cpu/armv7/sunxi/lowlevel_init.S b/arch/arm/cpu/armv7/sunxi/lowlevel_init.S
new file mode 100644
index 0000000..b80b3eb
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/lowlevel_init.S
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2015 Hans de Goede <hdegoede at redhat.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <version.h>
+#include <linux/linkage.h>
+
+/*
+ * On sunxi we need to do some setup *before* cpu_init_cp15 from start.S
+ * runs, we (ab)use save_boot_params for this.
+ */
+ENTRY(save_boot_params)
+#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN7I || \
+    defined CONFIG_MACH_SUN8I
+	mrc	p15, 0, r0, c1, c0, 1
+	orr	r0, r0, #(1<<6)
+	mcr	p15, 0, r0, c1, c0, 1
+#endif
+	bx	lr
+ENDPROC(save_boot_params)
-- 
2.1.0



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