[U-Boot] [v3 10/10] spi: cadence_qspi: add device tree binding doc

[Vikas MANOCHA]

Thanks Jagan,

> -----Original Message-----
> From: Jagan Teki [mailto:jteki at openedev.com]
> Sent: Monday, June 29, 2015 11:29 PM
> To: Vikas MANOCHA
> Cc: u-boot at lists.denx.de; Stefan Roese
> Subject: Re: [U-Boot] [v3 10/10] spi: cadence_qspi: add device tree binding
> doc
> 
> On 30 June 2015 at 02:19, Vikas Manocha <vikas.manocha at st.com> wrote:
> > This patch adds the device tree binding doc for the cadence qspi
> > controller & also removes the not needed properties from the device
> > trees using this controller.
> >
> > Signed-off-by: Vikas Manocha <vikas.manocha at st.com>
> > ---
> >
> > Changes in v3: added new
> >
> >  arch/arm/dts/socfpga.dtsi                    |    3 ---
> >  arch/arm/dts/socfpga_cyclone5_socrates.dts   |    1 -
> >  arch/arm/dts/stv0991.dts                     |    4 ----
> >  doc/device-tree-bindings/spi/spi-cadence.txt |   28
> ++++++++++++++++++++++++++
> >  4 files changed, 28 insertions(+), 8 deletions(-)  create mode 100644
> > doc/device-tree-bindings/spi/spi-cadence.txt
> >
> > diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
> > index 9b12420..35e6561 100644
> > --- a/arch/arm/dts/socfpga.dtsi
> > +++ b/arch/arm/dts/socfpga.dtsi
> > @@ -636,9 +636,6 @@
> >                                 <0xffa00000 0x1000>;
> >                         interrupts = <0 151 4>;
> >                         clocks = <&qspi_clk>;
> > -                       ext-decoder = <0>;  /* external decoder */
> > -                       num-cs = <4>;
> > -                       fifo-depth = <128>;
> >                         sram-size = <128>;
> >                         bus-num = <2>;
> >                         status = "disabled"; diff --git
> > a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > index ea30483..557787b 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > @@ -56,7 +56,6 @@
> >                 m25p,fast-read;
> >                 page-size = <256>;
> >                 block-size = <16>; /* 2^16, 64KB */
> > -               read-delay = <4>;  /* delay value in read data capture register */
> >                 tshsl-ns = <50>;
> >                 tsd2d-ns = <50>;
> >                 tchsh-ns = <4>;
> > diff --git a/arch/arm/dts/stv0991.dts b/arch/arm/dts/stv0991.dts index
> > 556df82..601148e 100644
> > --- a/arch/arm/dts/stv0991.dts
> > +++ b/arch/arm/dts/stv0991.dts
> > @@ -32,9 +32,6 @@
> >                         reg = <0x80203000 0x100>,
> >                                 <0x40000000 0x1000000>;
> >                         clocks = <3750000>;
> > -                       ext-decoder = <0>; /* external decoder */
> > -                       num-cs = <4>;
> > -                       fifo-depth = <256>;
> >                         sram-size = <256>;
> >                         bus-num = <0>;
> >                         status = "okay"; @@ -48,7 +45,6 @@
> >                                 m25p,fast-read;
> >                                 page-size = <256>;
> >                                 block-size = <16>;      /* 2^16, 64KB */
> > -                               read-delay = <4>;       /* delay value in read data capture
> register */
> >                                 tshsl-ns = <50>;
> >                                 tsd2d-ns = <50>;
> >                                 tchsh-ns = <4>; diff --git
> > a/doc/device-tree-bindings/spi/spi-cadence.txt
> > b/doc/device-tree-bindings/spi/spi-cadence.txt
> > new file mode 100644
> > index 0000000..c1e2233
> > --- /dev/null
> > +++ b/doc/device-tree-bindings/spi/spi-cadence.txt
> > @@ -0,0 +1,28 @@
> > +Cadence QSPI controller device tree bindings
> > +--------------------------------------------
> > +
> > +Required properties:
> > +- compatible           : should be "cadence,qspi".
> > +- reg                  : 1.Physical base address and size of SPI registers map.
> > +                         2. Physical base address & size of NOR Flash.
> > +- clocks               : Clock phandles (see clock bindings for details).
> > +- sram-size            : spi controller sram size.
> 
> ? bus-num

It is not being used in the cadence_qspi driver but used on socfpga arch to distinguish between different spi peripherals.

Stefan,
Can you please comment about it. It is ok to remove it from "arch/arm/dts/socfpga.dtsi"

Rgds,
Vikas

> 
> > +- status               : enable in requried dts.
> > +
> > +connected flash properties
> > +--------------------------
> > +
> > +- spi-max-frequency    : Max supported spi frequency.
> > +- page-size            : Flash page size.
> > +- block-size           : Flash memory block size.
> > +- tshsl-ns             : Added delay in master reference clocks (ref_clk) for
> > +                         the length that the master mode chip select outputs
> > +                         are de-asserted between transactions.
> > +- tsd2d-ns             : Delay in master reference clocks (ref_clk) between one
> > +                         chip select being de-activated and the activation of
> > +                         another.
> > +- tchsh-ns             : Delay in master reference clocks between last bit of
> > +                         current transaction and de-asserting the device chip
> > +                         select (n_ss_out).
> > +- tslch-ns             : Delay in master reference clocks between setting
> > +                         n_ss_out low and first bit transfer
> > --
> 
> thanks!
> --
> Jagan | openedev.