[U-Boot] [PATCH 13/55] exynos: dts: Support EC tunnel and main TPS65090 regulator
Simon Glass
sjg at chromium.org
Fri Jul 3 02:15:50 CEST 2015
On pit and pi the TPS65090 regulator is connected only to the EC and we
must use a tunnel to get to it. The existing U-Boot support relies on a
special driver. Add a tunnel definition so that the new device-model
TPS65090 driver can be used unmodified.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
arch/arm/dts/exynos5250-snow.dts | 98 ++++++++++++++++++++++++++-
arch/arm/dts/exynos5420-peach-pit.dts | 124 +++++++++++++++++++++++++++-------
arch/arm/dts/exynos5800-peach-pi.dts | 123 ++++++++++++++++++++++++++-------
3 files changed, 297 insertions(+), 48 deletions(-)
diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts
index 06d675b..653efb4 100644
--- a/arch/arm/dts/exynos5250-snow.dts
+++ b/arch/arm/dts/exynos5250-snow.dts
@@ -25,6 +25,7 @@
i2c2 = "/i2c at 12C80000";
i2c3 = "/i2c at 12C90000";
i2c4 = "/i2c at 12CA0000";
+ i2c104 = &i2c_104;
i2c5 = "/i2c at 12CB0000";
i2c6 = "/i2c at 12CC0000";
i2c7 = "/i2c at 12CD0000";
@@ -43,7 +44,7 @@
};
i2c4: i2c at 12CA0000 {
- cros_ec: cros-ec at 1e {
+ cros_ec_old: cros-ec at 1e {
reg = <0x1e>;
compatible = "google,cros-ec-i2c";
i2c-max-frequency = <100000>;
@@ -57,6 +58,101 @@
};
};
+ i2c-arbitrator {
+ compatible = "i2c-arb-gpio-challenge";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-parent = <&{/i2c at 12CA0000}>;
+
+ our-claim-gpio = <&gpf0 3 GPIO_ACTIVE_LOW>;
+ their-claim-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>;
+ slew-delay-us = <10>;
+ wait-retry-us = <3000>;
+ wait-free-us = <50000>;
+
+ /* Use ID 104 as a hint that we're on physical bus 4 */
+ i2c_104: i2c at 0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ battery: sbs-battery at b {
+ compatible = "sbs,sbs-battery";
+ reg = <0xb>;
+ sbs,poll-retry-count = <1>;
+ };
+
+ cros_ec: embedded-controller {
+ compatible = "google,cros-ec-i2c";
+ reg = <0x1e>;
+ interrupts = <6 IRQ_TYPE_NONE>;
+ interrupt-parent = <&gpx1>;
+ wakeup-source;
+ i2c-max-frequency = <100000>;
+ u-boot,i2c-offset-len = <0>;
+ ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
+ };
+
+ power-regulator {
+ compatible = "ti,tps65090";
+ reg = <0x48>;
+
+ regulators {
+ dcdc1 {
+ ti,enable-ext-control;
+ };
+ dcdc2 {
+ ti,enable-ext-control;
+ };
+ dcdc3 {
+ ti,enable-ext-control;
+ };
+ fet1: fet1 {
+ regulator-name = "vcd_led";
+ ti,overcurrent-wait = <3>;
+ };
+ tps65090_fet2: fet2 {
+ regulator-name = "video_mid";
+ regulator-always-on;
+ ti,overcurrent-wait = <3>;
+ };
+ fet3 {
+ regulator-name = "wwan_r";
+ regulator-always-on;
+ ti,overcurrent-wait = <3>;
+ };
+ fet4 {
+ regulator-name = "sdcard";
+ ti,overcurrent-wait = <3>;
+ };
+ fet5 {
+ regulator-name = "camout";
+ regulator-always-on;
+ ti,overcurrent-wait = <3>;
+ };
+ fet6: fet6 {
+ regulator-name = "lcd_vdd";
+ ti,overcurrent-wait = <3>;
+ };
+ tps65090_fet7: fet7 {
+ regulator-name = "video_mid_1a";
+ regulator-always-on;
+ ti,overcurrent-wait = <3>;
+ };
+ ldo1 {
+ };
+ ldo2 {
+ };
+ };
+
+ charger {
+ compatible = "ti,tps65090-charger";
+ };
+ };
+ };
+ };
+
spi at 12d30000 {
spi-max-frequency = <50000000>;
firmware_storage_spi: flash at 0 {
diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts
index 0f1002e..5182b2b 100644
--- a/arch/arm/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/dts/exynos5420-peach-pit.dts
@@ -26,6 +26,7 @@
serial0 = "/serial at 12C30000";
console = "/serial at 12C30000";
pmic = "/i2c at 12CA0000";
+ i2c104 = &i2c_tunnel;
};
dmc {
@@ -101,30 +102,6 @@
};
};
- spi at 12d40000 { /* spi2 */
- spi-max-frequency = <4000000>;
- spi-deactivate-delay = <200>;
-
- cros_ec: cros-ec at 0 {
- compatible = "google,cros-ec-spi";
- reg = <0>;
- spi-half-duplex;
- spi-max-timeout-ms = <1100>;
- ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>;
-
- /*
- * This describes the flash memory within the EC. Note
- * that the STM32L flash erases to 0, not 0xff.
- */
- #address-cells = <1>;
- #size-cells = <1>;
- flash at 8000000 {
- reg = <0x08000000 0x20000>;
- erase-value = <0>;
- };
- };
- };
-
xhci at 12000000 {
samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>;
};
@@ -159,4 +136,103 @@
};
};
+&spi_2 {
+ spi-max-frequency = <3125000>;
+ spi-deactivate-delay = <200>;
+ status = "okay";
+ num-cs = <1>;
+ samsung,spi-src-clk = <0>;
+ cs-gpios = <&gpb1 2 0>;
+
+ cros_ec: cros-ec at 0 {
+ compatible = "google,cros-ec-spi";
+ interrupt-parent = <&gpx1>;
+ interrupts = <5 0>;
+ reg = <0>;
+ spi-half-duplex;
+ spi-max-timeout-ms = <1100>;
+ ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /*
+ * This describes the flash memory within the EC. Note
+ * that the STM32L flash erases to 0, not 0xff.
+ */
+ flash at 8000000 {
+ reg = <0x08000000 0x20000>;
+ erase-value = <0>;
+ };
+
+ controller-data {
+ samsung,spi-feedback-delay = <1>;
+ };
+
+ i2c_tunnel: i2c-tunnel {
+ compatible = "google,cros-ec-i2c-tunnel";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ google,remote-bus = <0>;
+
+ battery: sbs-battery at b {
+ compatible = "sbs,sbs-battery";
+ reg = <0xb>;
+ sbs,poll-retry-count = <1>;
+ sbs,i2c-retry-count = <2>;
+ };
+
+ power-regulator at 48 {
+ compatible = "ti,tps65090";
+ reg = <0x48>;
+
+ regulators {
+ tps65090_dcdc1: dcdc1 {
+ ti,enable-ext-control;
+ };
+ tps65090_dcdc2: dcdc2 {
+ ti,enable-ext-control;
+ };
+ tps65090_dcdc3: dcdc3 {
+ ti,enable-ext-control;
+ };
+ tps65090_fet1: fet1 {
+ regulator-name = "vcd_led";
+ };
+ tps65090_fet2: fet2 {
+ regulator-name = "video_mid";
+ regulator-always-on;
+ };
+ tps65090_fet3: fet3 {
+ regulator-name = "wwan_r";
+ regulator-always-on;
+ };
+ tps65090_fet4: fet4 {
+ regulator-name = "sdcard";
+ regulator-always-on;
+ };
+ tps65090_fet5: fet5 {
+ regulator-name = "camout";
+ regulator-always-on;
+ };
+ tps65090_fet6: fet6 {
+ regulator-name = "lcd_vdd";
+ };
+ tps65090_fet7: fet7 {
+ regulator-name = "video_mid_1a";
+ regulator-always-on;
+ };
+ tps65090_ldo1: ldo1 {
+ };
+ tps65090_ldo2: ldo2 {
+ };
+ };
+
+ charger {
+ compatible = "ti,tps65090-charger";
+ };
+ };
+ };
+ };
+};
+
#include "cros-ec-keyboard.dtsi"
diff --git a/arch/arm/dts/exynos5800-peach-pi.dts b/arch/arm/dts/exynos5800-peach-pi.dts
index 4e548f7..600c294 100644
--- a/arch/arm/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/dts/exynos5800-peach-pi.dts
@@ -26,6 +26,7 @@
serial0 = "/serial at 12C30000";
console = "/serial at 12C30000";
pmic = "/i2c at 12CA0000";
+ i2c104 = &i2c_tunnel;
};
dmc {
@@ -93,29 +94,6 @@
};
};
- spi at 12d40000 { /* spi2 */
- spi-max-frequency = <4000000>;
- spi-deactivate-delay = <200>;
- cros_ec: cros-ec at 0 {
- compatible = "google,cros-ec-spi";
- reg = <0>;
- spi-half-duplex;
- spi-max-timeout-ms = <1100>;
- ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>;
-
- /*
- * This describes the flash memory within the EC. Note
- * that the STM32L flash erases to 0, not 0xff.
- */
- #address-cells = <1>;
- #size-cells = <1>;
- flash at 8000000 {
- reg = <0x08000000 0x20000>;
- erase-value = <0>;
- };
- };
- };
-
xhci at 12000000 {
samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>;
};
@@ -153,4 +131,103 @@
};
};
+&spi_2 {
+ spi-max-frequency = <3125000>;
+ spi-deactivate-delay = <200>;
+ status = "okay";
+ num-cs = <1>;
+ samsung,spi-src-clk = <0>;
+ cs-gpios = <&gpb1 2 0>;
+
+ cros_ec: cros-ec at 0 {
+ compatible = "google,cros-ec-spi";
+ interrupt-parent = <&gpx1>;
+ interrupts = <5 0>;
+ reg = <0>;
+ spi-half-duplex;
+ spi-max-timeout-ms = <1100>;
+ ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>;
+
+ /*
+ * This describes the flash memory within the EC. Note
+ * that the STM32L flash erases to 0, not 0xff.
+ */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ flash at 8000000 {
+ reg = <0x08000000 0x20000>;
+ erase-value = <0>;
+ };
+
+ controller-data {
+ samsung,spi-feedback-delay = <1>;
+ };
+
+ i2c_tunnel: i2c-tunnel {
+ compatible = "google,cros-ec-i2c-tunnel";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ google,remote-bus = <0>;
+
+ battery: sbs-battery at b {
+ compatible = "sbs,sbs-battery";
+ reg = <0xb>;
+ sbs,poll-retry-count = <1>;
+ sbs,i2c-retry-count = <2>;
+ };
+
+ power-regulator at 48 {
+ compatible = "ti,tps65090";
+ reg = <0x48>;
+
+ regulators {
+ tps65090_dcdc1: dcdc1 {
+ ti,enable-ext-control;
+ };
+ tps65090_dcdc2: dcdc2 {
+ ti,enable-ext-control;
+ };
+ tps65090_dcdc3: dcdc3 {
+ ti,enable-ext-control;
+ };
+ tps65090_fet1: fet1 {
+ regulator-name = "vcd_led";
+ };
+ tps65090_fet2: fet2 {
+ regulator-name = "video_mid";
+ regulator-always-on;
+ };
+ tps65090_fet3: fet3 {
+ regulator-name = "wwan_r";
+ regulator-always-on;
+ };
+ tps65090_fet4: fet4 {
+ regulator-name = "sdcard";
+ regulator-always-on;
+ };
+ tps65090_fet5: fet5 {
+ regulator-name = "camout";
+ regulator-always-on;
+ };
+ tps65090_fet6: fet6 {
+ regulator-name = "lcd_vdd";
+ };
+ tps65090_fet7: fet7 {
+ regulator-name = "video_mid_1a";
+ regulator-always-on;
+ };
+ tps65090_ldo1: ldo1 {
+ };
+ tps65090_ldo2: ldo2 {
+ };
+ };
+
+ charger {
+ compatible = "ti,tps65090-charger";
+ };
+ };
+ };
+ };
+};
+
#include "cros-ec-keyboard.dtsi"
--
2.4.3.573.g4eafbef
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