[U-Boot] [PATCH 5/8] net: zynq: Wait till packet is sent

[Michal Simek]

On 11/02/2015 10:40 PM, Joe Hershberger wrote:
> On Tue, Oct 27, 2015 at 10:17 AM, Michal Simek <michal.simek at xilinx.com> wrote:
>> Wait till BD is process to ensure that packet was sent successfully.
> 
> process -> processed

Fixed in v2.

> 
>>
>> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
>> ---
>>
>>  drivers/net/zynq_gem.c | 33 ++++++++++++++++++++++++++++++++-
>>  1 file changed, 32 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
>> index e49aa86127d1..c56e02132ae9 100644
>> --- a/drivers/net/zynq_gem.c
>> +++ b/drivers/net/zynq_gem.c
>> @@ -23,6 +23,7 @@
>>  #include <asm/system.h>
>>  #include <asm/arch/hardware.h>
>>  #include <asm/arch/sys_proto.h>
>> +#include <asm-generic/errno.h>
>>
>>  #if !defined(CONFIG_PHYLIB)
>>  # error XILINX_GEM_ETHERNET requires PHYLIB
>> @@ -86,6 +87,8 @@
>>                                         ZYNQ_GEM_DMACR_TXSIZE | \
>>                                         ZYNQ_GEM_DMACR_RXBUF)
>>
>> +#define ZYNQ_GEM_TSR_DONE              0x00000020 /* Tx done mask */
>> +
>>  /* Use MII register 1 (MII status register) to detect PHY */
>>  #define PHY_DETECT_REG  1
>>
>> @@ -427,6 +430,33 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
>>         return 0;
>>  }
>>
>> +static inline int wait_for_bit(const char *func, u32 *reg, const u32 mask,
>> +                              bool set, unsigned int timeout)
> 
> There is no need to specify "inline" here.

Fixed in v2.

Thanks,
Michal